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author | Jonathan Marek <jonathan@marek.ca> | 2020-09-23 12:06:27 -0400 |
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committer | Stephen Boyd <sboyd@kernel.org> | 2020-10-13 18:05:03 -0700 |
commit | 70d795d2d836e686e2fd4ed1d0abd8fb6ed3ae2a (patch) | |
tree | 9919f8148fad1cffb3034033a0084422e6ab41ed /Documentation/devicetree/bindings/clock/qcom,videocc.yaml | |
parent | 8c18b41b3931ad828111ec1e185fcdfffaf1c693 (diff) | |
download | lwn-70d795d2d836e686e2fd4ed1d0abd8fb6ed3ae2a.tar.gz lwn-70d795d2d836e686e2fd4ed1d0abd8fb6ed3ae2a.zip |
dt-bindings: clock: combine qcom,sdm845-videocc and qcom,sc7180-videocc
These two bindings are almost identical, so combine them into one. This
will make it easier to add the sm8150 and sm8250 videocc bindings.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200923160635.28370-2-jonathan@marek.ca
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/clock/qcom,videocc.yaml')
-rw-r--r-- | Documentation/devicetree/bindings/clock/qcom,videocc.yaml | 69 |
1 files changed, 69 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml new file mode 100644 index 000000000000..874be03c33f5 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,videocc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Video Clock & Reset Controller Binding + +maintainers: + - Taniya Das <tdas@codeaurora.org> + +description: | + Qualcomm video clock control module which supports the clocks, resets and + power domains on SDM845/SC7180. + + See also: + dt-bindings/clock/qcom,videocc-sc7180.h + dt-bindings/clock/qcom,videocc-sdm845.h + +properties: + compatible: + enum: + - qcom,sc7180-videocc + - qcom,sdm845-videocc + + clocks: + items: + - description: Board XO source + + clock-names: + items: + - const: bi_tcxo + + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + + '#power-domain-cells': + const: 1 + + reg: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - '#clock-cells' + - '#reset-cells' + - '#power-domain-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,rpmh.h> + clock-controller@ab00000 { + compatible = "qcom,sdm845-videocc"; + reg = <0x0ab00000 0x10000>; + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "bi_tcxo"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; +... |