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author | Anders Berg <anders.berg@lsi.com> | 2014-05-15 15:42:25 +0200 |
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committer | Mike Turquette <mturquette@linaro.org> | 2014-05-22 22:06:14 -0700 |
commit | c675a00c2d666c8e90da335eafbbae81201d53f7 (patch) | |
tree | ef80dbe179cefd170734c713e5f266ef6beeb014 /Documentation/devicetree/bindings/clock/lsi,axm5516-clks.txt | |
parent | bb178da701382a230e26d90cf94e8a24b280e0d9 (diff) | |
download | lwn-c675a00c2d666c8e90da335eafbbae81201d53f7.tar.gz lwn-c675a00c2d666c8e90da335eafbbae81201d53f7.zip |
clk: Add clock driver for AXM55xx SoC
Add clk driver to support clock blocks found on the AXM55xx devices. The driver
provides clock implementations for three different types of clock devices on
the AXM55xx device: PLL clock, a clock divider and a clock mux.
Signed-off-by: Anders Berg <anders.berg@lsi.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/clock/lsi,axm5516-clks.txt')
-rw-r--r-- | Documentation/devicetree/bindings/clock/lsi,axm5516-clks.txt | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/lsi,axm5516-clks.txt b/Documentation/devicetree/bindings/clock/lsi,axm5516-clks.txt new file mode 100644 index 000000000000..3ce97cfe999b --- /dev/null +++ b/Documentation/devicetree/bindings/clock/lsi,axm5516-clks.txt @@ -0,0 +1,29 @@ +AXM5516 clock driver bindings +----------------------------- + +Required properties : +- compatible : shall contain "lsi,axm5516-clks" +- reg : shall contain base register location and length +- #clock-cells : shall contain 1 + +The consumer specifies the desired clock by having the clock ID in its "clocks" +phandle cell. See <dt-bindings/clock/lsi,axxia-clock.h> for the list of +supported clock IDs. + +Example: + + clks: clock-controller@2010020000 { + compatible = "lsi,axm5516-clks"; + #clock-cells = <1>; + reg = <0x20 0x10020000 0 0x20000>; + }; + + serial0: uart@2010080000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x20 0x10080000 0 0x1000>; + interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks AXXIA_CLK_PER>; + clock-names = "apb_pclk"; + }; + }; + |