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author | Linus Walleij <linus.walleij@linaro.org> | 2020-03-20 14:45:24 +0100 |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2020-04-28 21:50:20 +0200 |
commit | 03d679bf004d49d5a58161946711f276831c978e (patch) | |
tree | f6c5e89765d6fade465157ee2893969fd4b1e07c /Documentation/devicetree/bindings/bus | |
parent | ce7107697986edff2bd7e8d0c0990d3109b5a009 (diff) | |
download | lwn-03d679bf004d49d5a58161946711f276831c978e.tar.gz lwn-03d679bf004d49d5a58161946711f276831c978e.zip |
bus: Add DT bindings for Integrator/AP logic modules
This adds YAML device tree bindings for the Integrator/AP
logic modules. These are plug-in tiles used typically for
FPGA prototyping.
Reviewed-by: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: Robin Murphy <robin.murphy@arm.com>
Link: https://lore.kernel.org/r/20200320134524.52140-1-linus.walleij@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/bus')
-rw-r--r-- | Documentation/devicetree/bindings/bus/arm,integrator-ap-lm.yaml | 83 |
1 files changed, 83 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/bus/arm,integrator-ap-lm.yaml b/Documentation/devicetree/bindings/bus/arm,integrator-ap-lm.yaml new file mode 100644 index 000000000000..47227427c1c0 --- /dev/null +++ b/Documentation/devicetree/bindings/bus/arm,integrator-ap-lm.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bus/arm,integrator-ap-lm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Integrator/AP Logic Module extension bus + +maintainers: + - Linus Walleij <linusw@kernel.org> + +description: The Integrator/AP is a prototyping platform and as such has a + site for stacking up to four logic modules (LM) designed specifically for + use with this platform. A special system controller register can be read to + determine if a logic module is connected at index 0, 1, 2 or 3. The logic + module connector is described in this binding. The logic modules per se + then have their own specific per-module bindings and they will be described + as subnodes under this logic module extension bus. + +properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + compatible: + items: + - const: arm,integrator-ap-lm + + ranges: true + dma-ranges: true + +patternProperties: + "^bus(@[0-9a-f]*)?$": + description: Nodes on the Logic Module bus represent logic modules + and are named with bus. The first module is at 0xc0000000, the second + at 0xd0000000 and so on until the top of the memory of the system at + 0xffffffff. All information about the memory used by the module is + in ranges and dma-ranges. + type: object + + required: + - compatible + +required: + - compatible + +examples: + - | + bus@c0000000 { + compatible = "arm,integrator-ap-lm"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0xc0000000 0xc0000000 0x40000000>; + dma-ranges; + + bus@c0000000 { + compatible = "simple-bus"; + ranges = <0x00000000 0xc0000000 0x10000000>; + /* The Logic Modules sees the Core Module 0 RAM @80000000 */ + dma-ranges = <0x00000000 0x80000000 0x10000000>; + #address-cells = <1>; + #size-cells = <1>; + + serial@100000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x00100000 0x1000>; + interrupts-extended = <&impd1_vic 1>; + }; + + impd1_vic: interrupt-controller@3000000 { + compatible = "arm,pl192-vic"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0x03000000 0x1000>; + valid-mask = <0x00000bff>; + interrupts-extended = <&pic 9>; + }; + }; + }; + +additionalProperties: false |