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| author | Marc Zyngier <maz@kernel.org> | 2022-04-19 19:27:47 +0100 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2022-04-20 13:00:35 +0100 |
| commit | bdcc2f280334e4e3f42a5a740494444f1026fb65 (patch) | |
| tree | a6cfcdbec6a76087dca539686ee2c75afb353e55 /Documentation/arm64/cpu-feature-registers.rst | |
| parent | 6a437208cb942a2dd98f7e1c3fd347ed3d425ffc (diff) | |
| download | lwn-bdcc2f280334e4e3f42a5a740494444f1026fb65.tar.gz lwn-bdcc2f280334e4e3f42a5a740494444f1026fb65.zip | |
arm64: Add RV and RN fields for ESR_ELx_WFx_ISS
The ISS field exposed by ESR_ELx contain two additional subfields
with FEAT_WFxT:
- RN, the register number containing the timeout
- RV, indicating if the register number is valid
Describe these two fields according to the arch spec.
No functional change.
Reviewed-by: Joey Gouly <joey.gouly@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20220419182755.601427-3-maz@kernel.org
Diffstat (limited to 'Documentation/arm64/cpu-feature-registers.rst')
0 files changed, 0 insertions, 0 deletions