diff options
author | Arnd Bergmann <arnd@arndb.de> | 2024-03-11 07:44:25 +0100 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2024-03-11 07:44:26 +0100 |
commit | c00304acdc64e042a1aef352afedbea192255f52 (patch) | |
tree | 76b50b03fa829911707665500a84d1a70c2cdaec | |
parent | de79649bf981d4c43bb60e29001451c672e6b14c (diff) | |
parent | 86964bb62a9334acfebd869ca8ffc184dc365b75 (diff) | |
download | lwn-c00304acdc64e042a1aef352afedbea192255f52.tar.gz lwn-c00304acdc64e042a1aef352afedbea192255f52.zip |
Merge tag 'arm-soc/for-6.9/drivers' of https://github.com/Broadcom/stblinux into soc/late
This pull request contains Broadcom SoC device drivers changes for 6.9,
please pull the following:
- Florian adds support for the 74165 GISB arbiter layout which shuffled
register offsets around
* tag 'arm-soc/for-6.9/drivers' of https://github.com/Broadcom/stblinux:
bus: brcmstb_gisb: Added support for 74165 register layout
dt-bindings: bus: Document Broadcom GISB arbiter 74165 compatible
Link: https://lore.kernel.org/r/20240307200441.2151734-2-florian.fainelli@broadcom.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-rw-r--r-- | Documentation/devicetree/bindings/bus/brcm,gisb-arb.yaml | 1 | ||||
-rw-r--r-- | drivers/bus/brcmstb_gisb.c | 15 |
2 files changed, 16 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/bus/brcm,gisb-arb.yaml b/Documentation/devicetree/bindings/bus/brcm,gisb-arb.yaml index 3aaefdbe361e..9017c5a3f3d2 100644 --- a/Documentation/devicetree/bindings/bus/brcm,gisb-arb.yaml +++ b/Documentation/devicetree/bindings/bus/brcm,gisb-arb.yaml @@ -18,6 +18,7 @@ properties: - const: brcm,gisb-arb - items: - enum: + - brcm,bcm74165-gisb-arb # for V7 new style 16nm chips - brcm,bcm7278-gisb-arb # for V7 28nm chips - brcm,bcm7435-gisb-arb # for newer 40nm chips - brcm,bcm7400-gisb-arb # for older 40nm chips and all 65nm chips diff --git a/drivers/bus/brcmstb_gisb.c b/drivers/bus/brcmstb_gisb.c index b6dfe4340da2..65ae758f3194 100644 --- a/drivers/bus/brcmstb_gisb.c +++ b/drivers/bus/brcmstb_gisb.c @@ -96,6 +96,20 @@ static const int gisb_offsets_bcm7400[] = { [ARB_ERR_CAP_MASTER] = 0x0d8, }; +static const int gisb_offsets_bcm74165[] = { + [ARB_TIMER] = 0x008, + [ARB_BP_CAP_CLR] = 0x044, + [ARB_BP_CAP_HI_ADDR] = -1, + [ARB_BP_CAP_ADDR] = 0x048, + [ARB_BP_CAP_STATUS] = 0x058, + [ARB_BP_CAP_MASTER] = 0x05c, + [ARB_ERR_CAP_CLR] = 0x038, + [ARB_ERR_CAP_HI_ADDR] = -1, + [ARB_ERR_CAP_ADDR] = 0x020, + [ARB_ERR_CAP_STATUS] = 0x030, + [ARB_ERR_CAP_MASTER] = 0x034, +}; + static const int gisb_offsets_bcm7435[] = { [ARB_TIMER] = 0x00c, [ARB_BP_CAP_CLR] = 0x014, @@ -393,6 +407,7 @@ static const struct of_device_id brcmstb_gisb_arb_of_match[] = { { .compatible = "brcm,bcm7400-gisb-arb", .data = gisb_offsets_bcm7400 }, { .compatible = "brcm,bcm7278-gisb-arb", .data = gisb_offsets_bcm7278 }, { .compatible = "brcm,bcm7038-gisb-arb", .data = gisb_offsets_bcm7038 }, + { .compatible = "brcm,bcm74165-gisb-arb", .data = gisb_offsets_bcm74165 }, { }, }; |