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author | Andrew Jeffery <andrew@aj.id.au> | 2016-09-28 00:20:15 +0930 |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2016-10-18 14:36:11 +0200 |
commit | d3dbabe9848092d26d14076cdf4d52734f998580 (patch) | |
tree | 08508bc2d8c2471425eb16b899fcb99e29f33cd9 | |
parent | 97e8c3f5e76582d63026585c79d39c1d1fb960e5 (diff) | |
download | lwn-d3dbabe9848092d26d14076cdf4d52734f998580.tar.gz lwn-d3dbabe9848092d26d14076cdf4d52734f998580.zip |
pinctrl: aspeed-g5: Fix GPIOE1 typo
This prevented C20 from successfully being muxed as GPIO.
Fixes: 56e57cb6c07f (pinctrl: Add pinctrl-aspeed-g5 driver)
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r-- | drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c index 14639834a5eb..235d929e74fd 100644 --- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c @@ -182,7 +182,7 @@ SIG_EXPR_LIST_DECL_SINGLE(NDCD3, NDCD3, SIG_DESC_SET(SCU80, 17)); SIG_EXPR_DECL(GPIE0OUT, GPIE0, GPIE0_DESC); SIG_EXPR_DECL(GPIE0OUT, GPIE, GPIE_DESC); SIG_EXPR_LIST_DECL_DUAL(GPIE0OUT, GPIE0, GPIE); -MS_PIN_DECL(C20, GPIE0, NDCD3, GPIE0OUT); +MS_PIN_DECL(C20, GPIOE1, NDCD3, GPIE0OUT); FUNC_GROUP_DECL(GPIE0, B20, C20); |