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| author | Conor Dooley <conor.dooley@microchip.com> | 2022-02-07 16:26:29 +0000 |
|---|---|---|
| committer | Wolfram Sang <wsa@kernel.org> | 2022-02-11 18:53:04 +0100 |
| commit | f1bd6661946b20d1ea07de84a3c9a550e0367476 (patch) | |
| tree | 0d2df838a2ffd90ea2483fd5dc0123b05f739814 | |
| parent | d0aee048d648ec2d9aa7af43b127ebf847d497d5 (diff) | |
| download | lwn-f1bd6661946b20d1ea07de84a3c9a550e0367476.tar.gz lwn-f1bd6661946b20d1ea07de84a3c9a550e0367476.zip | |
dt-bindings: i2c: add bindings for microchip mpfs i2c
Add device tree bindings for the i2c controller on
the Microchip PolarFire SoC.
Signed-off-by: Daire McNamara <daire.mcnamara@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
| -rw-r--r-- | Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml b/Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml new file mode 100644 index 000000000000..c8e605fbb8a6 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/microchip,corei2c.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip MPFS I2C Controller Device Tree Bindings + +maintainers: + - Daire McNamara <daire.mcnamara@microchip.com> + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +properties: + compatible: + oneOf: + - items: + - const: microchip,mpfs-i2c # Microchip PolarFire SoC compatible SoCs + - const: microchip,corei2c-rtl-v7 # Microchip Fabric based i2c IP core + - const: microchip,corei2c-rtl-v7 # Microchip Fabric based i2c IP core + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-frequency: + description: | + Desired I2C bus clock frequency in Hz. As only Standard and Fast + modes are supported, possible values are 100000 and 400000. + enum: [100000, 400000] + +required: + - compatible + - reg + - interrupts + - clocks + +unevaluatedProperties: false + +examples: + - | + i2c@2010a000 { + compatible = "microchip,mpfs-i2c", "microchip,corei2c-rtl-v7"; + reg = <0x2010a000 0x1000>; + clocks = <&clkcfg 15>; + interrupt-parent = <&plic>; + interrupts = <58>; + clock-frequency = <100000>; + }; +... |