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authorMaciej W. Rozycki <macro@imgtec.com>2016-01-22 05:21:34 +0000
committerRalf Baechle <ralf@linux-mips.org>2016-01-24 01:36:50 +0100
commit29e280034810efeb84ca67a535817cf45e7cd7fe (patch)
tree0107c0b40972e108382c47306d9a68212a849336
parent6e1715f7c34d00dc94f3cecb2526ae3ff0b0649f (diff)
downloadlwn-29e280034810efeb84ca67a535817cf45e7cd7fe.tar.gz
lwn-29e280034810efeb84ca67a535817cf45e7cd7fe.zip
MIPS: inst.h: Fix some instruction descriptions
Fix the description of the microMIPS NOP16 encoding or MM_NOP16, which is not equivalent to the MIPS16 NOP instruction. This is 0x0c00 and represents the microMIPS `MOVE16 $0, $0' operation, whereas MIPS16 NOP is encoded as 0x6500, representing `MOVE $0, $16'. Also fix a typo in `mm_fp0_format' description. Signed-off-by: Maciej W. Rozycki <macro@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/12177/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/include/uapi/asm/inst.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h
index b145749c743f..f5364e96554a 100644
--- a/arch/mips/include/uapi/asm/inst.h
+++ b/arch/mips/include/uapi/asm/inst.h
@@ -529,7 +529,7 @@ enum MIPS6e_i8_func {
};
/*
- * (microMIPS & MIPS16e) NOP instruction.
+ * (microMIPS) NOP instruction.
*/
#define MM_NOP16 0x0c00
@@ -679,7 +679,7 @@ struct fp0_format { /* FPU multiply and add format (MIPS32) */
;))))))
};
-struct mm_fp0_format { /* FPU multipy and add format (microMIPS) */
+struct mm_fp0_format { /* FPU multiply and add format (microMIPS) */
__BITFIELD_FIELD(unsigned int opcode : 6,
__BITFIELD_FIELD(unsigned int ft : 5,
__BITFIELD_FIELD(unsigned int fs : 5,