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| author | Jani Nikula <jani.nikula@intel.com> | 2023-03-01 15:54:17 +0200 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2023-03-06 18:26:10 +0200 |
| commit | 893a6c224a24be49ea5a30315d1ae5967598a43d (patch) | |
| tree | 55b9d2226ba50d4928cb578849134db679e993c9 | |
| parent | d3708182cbc3404aa2f7fd5ccfa07328018f4bf5 (diff) | |
| download | lwn-893a6c224a24be49ea5a30315d1ae5967598a43d.tar.gz lwn-893a6c224a24be49ea5a30315d1ae5967598a43d.zip | |
drm/i915/pm: drop intel_suspend_hw()
All intel_suspend_hw() does is clear PCH_LP_PARTITION_LEVEL_DISABLE bit
in SOUTH_DSPCLK_GATE_D for LPT LP. intel_suspend_hw() gets called from
i915_drm_suspend().
However, i915_drm_suspend_late() calls
intel_display_power_suspend_late(), which in turn calls hsw_enable_pc8()
on HSW and BDW. The first thing that does is clear
PCH_LP_PARTITION_LEVEL_DISABLE bit in SOUTH_DSPCLK_GATE_D.
Remove the duplicated clearing of the bit, effectively delaying it from
i915_drm_suspend() to i915_drm_suspend_late(), and remove the
unnecessary intel_suspend_hw() function altogether.
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/f732a7922c2450b41169c9b79a80fba97ab00592.1677678803.git.jani.nikula@intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/i915_driver.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 16 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.h | 1 |
3 files changed, 0 insertions, 19 deletions
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c index 3539eb2bef1f..4a2dc43791c3 100644 --- a/drivers/gpu/drm/i915/i915_driver.c +++ b/drivers/gpu/drm/i915/i915_driver.c @@ -1076,8 +1076,6 @@ static int i915_drm_suspend(struct drm_device *dev) intel_suspend_encoders(dev_priv); - intel_suspend_hw(dev_priv); - /* Must be called before GGTT is suspended. */ intel_dpt_suspend(dev_priv); i915_ggtt_suspend(to_gt(dev_priv)->ggtt); diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 605c72eba94a..b11b82e384b1 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -320,16 +320,6 @@ static void lpt_init_clock_gating(struct drm_i915_private *dev_priv) 0, TRANS_CHICKEN1_DP0UNIT_GC_DISABLE); } -static void lpt_suspend_hw(struct drm_i915_private *dev_priv) -{ - if (HAS_PCH_LPT_LP(dev_priv)) { - u32 val = intel_uncore_read(&dev_priv->uncore, SOUTH_DSPCLK_GATE_D); - - val &= ~PCH_LP_PARTITION_LEVEL_DISABLE; - intel_uncore_write(&dev_priv->uncore, SOUTH_DSPCLK_GATE_D, val); - } -} - static void gen8_set_l3sqc_credits(struct drm_i915_private *dev_priv, int general_prio_credits, int high_prio_credits) @@ -789,12 +779,6 @@ void intel_init_clock_gating(struct drm_i915_private *dev_priv) dev_priv->clock_gating_funcs->init_clock_gating(dev_priv); } -void intel_suspend_hw(struct drm_i915_private *dev_priv) -{ - if (HAS_PCH_LPT(dev_priv)) - lpt_suspend_hw(dev_priv); -} - static void nop_init_clock_gating(struct drm_i915_private *dev_priv) { drm_dbg_kms(&dev_priv->drm, diff --git a/drivers/gpu/drm/i915/intel_pm.h b/drivers/gpu/drm/i915/intel_pm.h index 1dd464d2d186..f774bddcdca6 100644 --- a/drivers/gpu/drm/i915/intel_pm.h +++ b/drivers/gpu/drm/i915/intel_pm.h @@ -13,7 +13,6 @@ struct intel_crtc_state; struct intel_plane_state; void intel_init_clock_gating(struct drm_i915_private *dev_priv); -void intel_suspend_hw(struct drm_i915_private *dev_priv); void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv); #endif /* __INTEL_PM_H__ */ |