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authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>2024-08-06 13:49:28 +0200
committerMark Brown <broonie@kernel.org>2024-08-08 20:34:51 +0100
commit2f3e2c9eaafc272266344d777f8de44f8632e247 (patch)
treea822b64306898cc81a00dc33d28dfb16fd353db1
parent6675e76a5c441b52b1b983ebb714122087020ebe (diff)
downloadlwn-2f3e2c9eaafc272266344d777f8de44f8632e247.tar.gz
lwn-2f3e2c9eaafc272266344d777f8de44f8632e247.zip
ASoC: dt-bindings: qcom,wcd937x: Correct reset GPIO polarity in example
The reset GPIO of WCD9370/WCD9375 is active low and that's how it is routed on typical boards, so correct the example DTS to use expected polarity. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20240806114931.40090-1-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r--Documentation/devicetree/bindings/sound/qcom,wcd937x.yaml2
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/sound/qcom,wcd937x.yaml b/Documentation/devicetree/bindings/sound/qcom,wcd937x.yaml
index de397d879acc..f94203798f24 100644
--- a/Documentation/devicetree/bindings/sound/qcom,wcd937x.yaml
+++ b/Documentation/devicetree/bindings/sound/qcom,wcd937x.yaml
@@ -42,7 +42,7 @@ examples:
pinctrl-names = "default", "sleep";
pinctrl-0 = <&wcd_reset_n>;
pinctrl-1 = <&wcd_reset_n_sleep>;
- reset-gpios = <&tlmm 83 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&tlmm 83 GPIO_ACTIVE_LOW>;
vdd-buck-supply = <&vreg_l17b_1p8>;
vdd-rxtx-supply = <&vreg_l18b_1p8>;
vdd-px-supply = <&vreg_l18b_1p8>;