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authorLinus Torvalds <torvalds@linux-foundation.org>2020-06-27 13:08:14 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2020-06-27 13:08:14 -0700
commit42f8f9bc5cb7c35ca04a6867cc01c24538d59f7f (patch)
treea49d3f95d9e332c80f3646e720511a105b53ea78
parentf05baa066d0f6a38f0624c28008fb2f53cd00e17 (diff)
parentee470bb25d0dcdf126f586ec0ae6dca66cb340a4 (diff)
downloadlwn-42f8f9bc5cb7c35ca04a6867cc01c24538d59f7f.tar.gz
lwn-42f8f9bc5cb7c35ca04a6867cc01c24538d59f7f.zip
Merge tag 'edac_urgent_for_5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras
Pull EDAC fix from Borislav Petkov: "A single fix for amd64_edac restoring the reporting of the DRAM scrub rate on family 0x15 CPUs" * tag 'edac_urgent_for_5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras: EDAC/amd64: Read back the scrub rate PCI register on F15h
-rw-r--r--drivers/edac/amd64_edac.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index ef90070a9194..6262f6370c5d 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -269,6 +269,8 @@ static int get_scrub_rate(struct mem_ctl_info *mci)
if (pvt->model == 0x60)
amd64_read_pci_cfg(pvt->F2, F15H_M60H_SCRCTRL, &scrubval);
+ else
+ amd64_read_pci_cfg(pvt->F3, SCRCTRL, &scrubval);
} else {
amd64_read_pci_cfg(pvt->F3, SCRCTRL, &scrubval);
}