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| author | Bjorn Andersson <bjorn.andersson@linaro.org> | 2020-04-30 11:17:16 -0700 |
|---|---|---|
| committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2020-06-21 12:36:35 -0700 |
| commit | 16951b490b2073d860b30745998f1df621bb8c86 (patch) | |
| tree | 636ad42d6ed03562de08ce67c40dd2b9b758da6d | |
| parent | 4c5a410d3bad42c37bc85364f926a19934066a72 (diff) | |
| download | lwn-16951b490b2073d860b30745998f1df621bb8c86.tar.gz lwn-16951b490b2073d860b30745998f1df621bb8c86.zip | |
arm64: dts: qcom: sm8250: Add TLMM pinctrl node
Add the TLMM pinctrl node for SM8250 and reserve pins 28-31 and 40-43 on
the MTP as firmware does not allow Linux to touch these pins.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20200430181716.3797842-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sm8250-mtp.dts | 4 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sm8250.dtsi | 15 |
2 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts index aa37eb112d85..2fc9e7ff0060 100644 --- a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts @@ -359,6 +359,10 @@ status = "okay"; }; +&tlmm { + gpio-reserved-ranges = <28 4>, <40 4>; +}; + &uart2 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index daad5d45e6bd..169cfcad561d 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -410,6 +410,21 @@ #interrupt-cells = <4>; }; + tlmm: pinctrl@f100000 { + compatible = "qcom,sm8250-pinctrl"; + reg = <0 0x0f100000 0 0x300000>, + <0 0x0f500000 0 0x300000>, + <0 0x0f900000 0 0x300000>; + reg-names = "west", "south", "north"; + interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-ranges = <&tlmm 0 0 180>; + wakeup-parent = <&pdc>; + }; + intc: interrupt-controller@17a00000 { compatible = "arm,gic-v3"; #interrupt-cells = <3>; |