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authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>2019-01-18 23:52:21 +0100
committerKevin Hilman <khilman@baylibre.com>2019-02-11 12:52:25 -0800
commitb6db3936f2833c9f27aa9d868bb7bb6e87401b40 (patch)
treefca37c1249b265ef053f120d6ee508bd4a77ae8e
parent29f0023d01f063feacfc404f0446905aee4f82ee (diff)
downloadlwn-b6db3936f2833c9f27aa9d868bb7bb6e87401b40.tar.gz
lwn-b6db3936f2833c9f27aa9d868bb7bb6e87401b40.zip
ARM: dts: meson: switch the clock controller to the HHI register area
The clock controller on Meson8/Meson8m2 and Meson8b is part of a register region called "HHI". This register area contains more functionality than just a clock controller: - the clock controller - some reset controller bits - temperature sensor calibration data (on Meson8b and Meson8m2 only) - HDMI controller Allow access to this HHI register area as "system controller". Also migrate the Meson8 and Meson8b clock controllers to this new node. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
-rw-r--r--arch/arm/boot/dts/meson.dtsi7
-rw-r--r--arch/arm/boot/dts/meson8.dtsi15
-rw-r--r--arch/arm/boot/dts/meson8b.dtsi15
3 files changed, 23 insertions, 14 deletions
diff --git a/arch/arm/boot/dts/meson.dtsi b/arch/arm/boot/dts/meson.dtsi
index e4645f612712..536d6314d97e 100644
--- a/arch/arm/boot/dts/meson.dtsi
+++ b/arch/arm/boot/dts/meson.dtsi
@@ -72,6 +72,13 @@
#size-cells = <1>;
ranges = <0x0 0xc1100000 0x200000>;
+ hhi: system-controller@4000 {
+ compatible = "amlogic,meson-hhi-sysctrl",
+ "simple-mfd",
+ "syscon";
+ reg = <0x4000 0x400>;
+ };
+
assist: assist@7c00 {
compatible = "amlogic,meson-mx-assist", "syscon";
reg = <0x7c00 0x200>;
diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi
index 1ea5a36c5040..66b167537aaa 100644
--- a/arch/arm/boot/dts/meson8.dtsi
+++ b/arch/arm/boot/dts/meson8.dtsi
@@ -327,13 +327,6 @@
};
&cbus {
- clkc: clock-controller@4000 {
- #clock-cells = <1>;
- #reset-cells = <1>;
- compatible = "amlogic,meson8-clkc";
- reg = <0x8000 0x4>, <0x4000 0x400>;
- };
-
reset: reset-controller@4404 {
compatible = "amlogic,meson8b-reset";
reg = <0x4404 0x9c>;
@@ -468,6 +461,14 @@
status = "okay";
};
+&hhi {
+ clkc: clock-controller {
+ compatible = "amlogic,meson8-clkc";
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+};
+
&hwrng {
compatible = "amlogic,meson8-rng", "amlogic,meson-rng";
clocks = <&clkc CLKID_RNG0>;
diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi
index 9fca77478fec..9faf70a6ed9a 100644
--- a/arch/arm/boot/dts/meson8b.dtsi
+++ b/arch/arm/boot/dts/meson8b.dtsi
@@ -276,13 +276,6 @@
};
&cbus {
- clkc: clock-controller@4000 {
- #clock-cells = <1>;
- #reset-cells = <1>;
- compatible = "amlogic,meson8b-clkc";
- reg = <0x8000 0x4>, <0x4000 0x400>;
- };
-
reset: reset-controller@4404 {
compatible = "amlogic,meson8b-reset";
reg = <0x4404 0x9c>;
@@ -437,6 +430,14 @@
status = "okay";
};
+&hhi {
+ clkc: clock-controller {
+ compatible = "amlogic,meson8-clkc";
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+};
+
&hwrng {
compatible = "amlogic,meson8b-rng", "amlogic,meson-rng";
clocks = <&clkc CLKID_RNG0>;