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| author | Ben Widawsky <benjamin.widawsky@intel.com> | 2014-05-06 22:21:30 -0700 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-05-07 10:01:41 +0200 |
| commit | 3e8b5ae9b0e48281712ade208a2d0d6d2ee4a6d6 (patch) | |
| tree | fc18be345e6ab747c3cda453f3bf90c1a9978be9 | |
| parent | fd7f8ccea8166582a3e931d6819e7e8b17ac1157 (diff) | |
| download | lwn-3e8b5ae9b0e48281712ade208a2d0d6d2ee4a6d6.tar.gz lwn-3e8b5ae9b0e48281712ade208a2d0d6d2ee4a6d6.zip | |
drm/i915: Use topdown allocation for PPGTT PDEs on gen6/7
It was always the intention to do the topdown allocation for context
objects (Chris' idea originally). Unfortunately, I never managed to land
the patch, but someone else did, so now we can use it.
As a reminder, hardware contexts never need to be in the precious GTT
aperture space - which is what is what happens with the normal bottom up
allocation we do today. Doing a top down allocation increases the odds
that the HW contexts can get out of the way, especially with per FD
contexts as is done in full PPGTT
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| -rw-r--r-- | drivers/gpu/drm/i915/i915_gem_gtt.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index 1827b4b349a1..84dcb4e00d4c 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -1035,8 +1035,7 @@ alloc: &ppgtt->node, GEN6_PD_SIZE, GEN6_PD_ALIGN, 0, 0, dev_priv->gtt.base.total, - DRM_MM_SEARCH_DEFAULT, - DRM_MM_CREATE_DEFAULT); + DRM_MM_TOPDOWN); if (ret == -ENOSPC && !retried) { ret = i915_gem_evict_something(dev, &dev_priv->gtt.base, GEN6_PD_SIZE, GEN6_PD_ALIGN, |