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authorKrzysztof Halasa <khc@pm.waw.pl>2007-10-16 01:29:18 -0700
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-16 09:43:18 -0700
commit10b98368a0a94b015c1a596b7a02eff447a65226 (patch)
tree567997a1ba3e973c630aa203231f8c70aab316a0
parent68e5e9d734503695915734e50e9427624cf8f3b2 (diff)
downloadlwn-10b98368a0a94b015c1a596b7a02eff447a65226.tar.gz
lwn-10b98368a0a94b015c1a596b7a02eff447a65226.zip
Intel FB: support for interlaced video modes
Intel framebuffer now supports interlaced video modes. Signed-off-by: Krzysztof Halasa <khc@pm.waw.pl> Cc: "Antonino A. Daplas" <adaplas@pol.net> Cc: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
-rw-r--r--drivers/video/intelfb/intelfbhw.c12
-rw-r--r--drivers/video/intelfb/intelfbhw.h4
2 files changed, 11 insertions, 5 deletions
diff --git a/drivers/video/intelfb/intelfbhw.c b/drivers/video/intelfb/intelfbhw.c
index 6a47682d8614..04d0e0fd9bc0 100644
--- a/drivers/video/intelfb/intelfbhw.c
+++ b/drivers/video/intelfb/intelfbhw.c
@@ -323,11 +323,7 @@ intelfbhw_validate_mode(struct intelfb_info *dinfo,
return 1;
}
- /* Check for interlaced/doublescan modes. */
- if (var->vmode & FB_VMODE_INTERLACED) {
- WRN_MSG("Mode is interlaced.\n");
- return 1;
- }
+ /* Check for doublescan modes. */
if (var->vmode & FB_VMODE_DOUBLE) {
WRN_MSG("Mode is double-scan.\n");
return 1;
@@ -1220,6 +1216,12 @@ intelfbhw_mode_to_hw(struct intelfb_info *dinfo, struct intelfb_hwstate *hw,
/* Set the palette to 8-bit mode. */
*pipe_conf &= ~PIPECONF_GAMMA;
+
+ if (var->vmode & FB_VMODE_INTERLACED)
+ *pipe_conf |= PIPECONF_INTERLACE_W_FIELD_INDICATION;
+ else
+ *pipe_conf &= ~PIPECONF_INTERLACE_MASK;
+
return 0;
}
diff --git a/drivers/video/intelfb/intelfbhw.h b/drivers/video/intelfb/intelfbhw.h
index 8c54ba8fbdda..cfcd53749484 100644
--- a/drivers/video/intelfb/intelfbhw.h
+++ b/drivers/video/intelfb/intelfbhw.h
@@ -286,6 +286,10 @@
#define PIPECONF_UNLOCKED 0
#define PIPECONF_GAMMA (1 << 24)
#define PIPECONF_PALETTE 0
+#define PIPECONF_PROGRESSIVE (0 << 21)
+#define PIPECONF_INTERLACE_W_FIELD_INDICATION (6 << 21)
+#define PIPECONF_INTERLACE_FIELD_0_ONLY (7 << 21)
+#define PIPECONF_INTERLACE_MASK (7 << 21)
#define DISPARB 0x70030
#define DISPARB_AEND_MASK 0x1ff