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author | Nick Piggin <npiggin@suse.de> | 2008-05-14 06:35:11 +0200 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-05-14 10:05:18 -0700 |
commit | 73f10281ea96d7e8b4fc1c5d755a7c8eb484155b (patch) | |
tree | d75ab7ba0f571ce0c08d30a04f1da7c781b02092 | |
parent | 4ef7e3e90f56c74b2a17e12d49ed35c3767d66c2 (diff) | |
download | lwn-73f10281ea96d7e8b4fc1c5d755a7c8eb484155b.tar.gz lwn-73f10281ea96d7e8b4fc1c5d755a7c8eb484155b.zip |
read_barrier_depends arch fixlets
read_barrie_depends has always been a noop (not a compiler barrier) on all
architectures except SMP alpha. This brings UP alpha and frv into line with all
other architectures, and fixes incorrect documentation.
Signed-off-by: Nick Piggin <npiggin@suse.de>
Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
-rw-r--r-- | Documentation/memory-barriers.txt | 12 | ||||
-rw-r--r-- | include/asm-alpha/barrier.h | 2 | ||||
-rw-r--r-- | include/asm-frv/system.h | 2 |
3 files changed, 13 insertions, 3 deletions
diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt index e5a819a4f0c9..f5b7127f54ac 100644 --- a/Documentation/memory-barriers.txt +++ b/Documentation/memory-barriers.txt @@ -994,7 +994,17 @@ The Linux kernel has eight basic CPU memory barriers: DATA DEPENDENCY read_barrier_depends() smp_read_barrier_depends() -All CPU memory barriers unconditionally imply compiler barriers. +All memory barriers except the data dependency barriers imply a compiler +barrier. Data dependencies do not impose any additional compiler ordering. + +Aside: In the case of data dependencies, the compiler would be expected to +issue the loads in the correct order (eg. `a[b]` would have to load the value +of b before loading a[b]), however there is no guarantee in the C specification +that the compiler may not speculate the value of b (eg. is equal to 1) and load +a before b (eg. tmp = a[1]; if (b != 1) tmp = a[b]; ). There is also the +problem of a compiler reloading b after having loaded a[b], thus having a newer +copy of b than a[b]. A consensus has not yet been reached about these problems, +however the ACCESS_ONCE macro is a good place to start looking. SMP memory barriers are reduced to compiler barriers on uniprocessor compiled systems because it is assumed that a CPU will appear to be self-consistent, diff --git a/include/asm-alpha/barrier.h b/include/asm-alpha/barrier.h index 384dc08d6f53..ac78eba909bc 100644 --- a/include/asm-alpha/barrier.h +++ b/include/asm-alpha/barrier.h @@ -24,7 +24,7 @@ __asm__ __volatile__("mb": : :"memory") #define smp_mb() barrier() #define smp_rmb() barrier() #define smp_wmb() barrier() -#define smp_read_barrier_depends() barrier() +#define smp_read_barrier_depends() do { } while (0) #endif #define set_mb(var, value) \ diff --git a/include/asm-frv/system.h b/include/asm-frv/system.h index cb307f8a6b48..d3a12a9079f7 100644 --- a/include/asm-frv/system.h +++ b/include/asm-frv/system.h @@ -179,7 +179,7 @@ do { \ #define mb() asm volatile ("membar" : : :"memory") #define rmb() asm volatile ("membar" : : :"memory") #define wmb() asm volatile ("membar" : : :"memory") -#define read_barrier_depends() barrier() +#define read_barrier_depends() do { } while (0) #ifdef CONFIG_SMP #define smp_mb() mb() |