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authorHuacai Chen <chenhc@lemote.com>2016-04-19 19:19:11 +0800
committerSasha Levin <sasha.levin@oracle.com>2016-05-10 12:17:32 -0400
commitb9a11c92d2060b6bafa8babb890d9e711e8b0f5e (patch)
tree49fb6cead3d69b200721c1e7e07bc4abcef92152
parent2719d3c05d4c93054e7c5838cc5b1906f72b465e (diff)
downloadlwn-b9a11c92d2060b6bafa8babb890d9e711e8b0f5e.tar.gz
lwn-b9a11c92d2060b6bafa8babb890d9e711e8b0f5e.zip
drm: Loongson-3 doesn't fully support wc memory
[ Upstream commit 221004c66a58949a0f25c937a6789c0839feb530 ] Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: stable@vger.kernel.org Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Sasha Levin <sasha.levin@oracle.com>
-rw-r--r--include/drm/drm_cache.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/drm/drm_cache.h b/include/drm/drm_cache.h
index 461a0558bca4..cebecff536a3 100644
--- a/include/drm/drm_cache.h
+++ b/include/drm/drm_cache.h
@@ -39,6 +39,8 @@ static inline bool drm_arch_can_wc_memory(void)
{
#if defined(CONFIG_PPC) && !defined(CONFIG_NOT_COHERENT_CACHE)
return false;
+#elif defined(CONFIG_MIPS) && defined(CONFIG_CPU_LOONGSON3)
+ return false;
#else
return true;
#endif