diff options
author | Alex Dubov <oakad@yahoo.com> | 2006-12-08 16:50:50 +1100 |
---|---|---|
committer | Pierre Ossman <drzeus@drzeus.cx> | 2007-02-04 20:54:07 +0100 |
commit | 83d420ba92bdd52127e4548ae8050a48f655ce3b (patch) | |
tree | 2a0517aaea3417aca3a88462325d340a9917c7a6 | |
parent | 0803dd0c2594c7dc70c14ab00ea21e68605f5ba1 (diff) | |
download | lwn-83d420ba92bdd52127e4548ae8050a48f655ce3b.tar.gz lwn-83d420ba92bdd52127e4548ae8050a48f655ce3b.zip |
tifm_sd: fix hardware timeout setup
The register access order when setting hardware timeout was incorrect and
causing problems (wrong timeout intervals). This is now fixed.
Signed-off-by: Alex Dubov <oakad@yahoo.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
-rw-r--r-- | drivers/mmc/tifm_sd.c | 15 |
1 files changed, 7 insertions, 8 deletions
diff --git a/drivers/mmc/tifm_sd.c b/drivers/mmc/tifm_sd.c index 69b78eb16eff..5817a138a1e4 100644 --- a/drivers/mmc/tifm_sd.c +++ b/drivers/mmc/tifm_sd.c @@ -442,22 +442,21 @@ static void tifm_sd_set_data_timeout(struct tifm_sd *host, return; data_timeout += data->timeout_ns / - ((1000000000 / host->clk_freq) * host->clk_div); - data_timeout *= 10; // call it fudge factor for now + ((1000000000UL / host->clk_freq) * host->clk_div); if (data_timeout < 0xffff) { - writel((~TIFM_MMCSD_DPE) & - readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG), - sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG); writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO); + writel((~TIFM_MMCSD_DPE) + & readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG), + sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG); } else { - writel(TIFM_MMCSD_DPE | - readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG), - sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG); data_timeout = (data_timeout >> 10) + 1; if(data_timeout > 0xffff) data_timeout = 0; /* set to unlimited */ writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO); + writel(TIFM_MMCSD_DPE + | readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG), + sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG); } } |