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| author | Chen-Yu Tsai <wens@csie.org> | 2014-02-10 18:35:50 +0800 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2014-02-10 20:46:16 +0100 |
| commit | 129ccbcd6fc704f3a0df892240f3aeb463d461f5 (patch) | |
| tree | 7387d690e9e6e2c57fc0f8bee6f4fda5ade17730 | |
| parent | c40b8d5858f6396b11d7f859a76bef9b82a65743 (diff) | |
| download | lwn-129ccbcd6fc704f3a0df892240f3aeb463d461f5.tar.gz lwn-129ccbcd6fc704f3a0df892240f3aeb463d461f5.zip | |
ARM: dts: sun7i: Add pin muxing options for the GMAC
The A20 has EMAC and GMAC muxed on the same pins.
Add pin sets with gmac function for MII and RGMII mode to the DTSI.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| -rw-r--r-- | arch/arm/boot/dts/sun7i-a20.dtsi | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 8eb4d54a9056..68c889c9fd38 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -484,6 +484,32 @@ allwinner,drive = <0>; allwinner,pull = <0>; }; + + gmac_pins_mii_a: gmac_mii@0 { + allwinner,pins = "PA0", "PA1", "PA2", + "PA3", "PA4", "PA5", "PA6", + "PA7", "PA8", "PA9", "PA10", + "PA11", "PA12", "PA13", "PA14", + "PA15", "PA16"; + allwinner,function = "gmac"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + + gmac_pins_rgmii_a: gmac_rgmii@0 { + allwinner,pins = "PA0", "PA1", "PA2", + "PA3", "PA4", "PA5", "PA6", + "PA7", "PA8", "PA10", + "PA11", "PA12", "PA13", + "PA15", "PA16"; + allwinner,function = "gmac"; + /* + * data lines in RGMII mode use DDR mode + * and need a higher signal drive strength + */ + allwinner,drive = <3>; + allwinner,pull = <0>; + }; }; timer@01c20c00 { |