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authorThomas Huth <thuth@redhat.com>2015-11-20 09:11:45 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2016-02-25 11:58:54 -0800
commitb779a07997536eb821ec3cbcee18ab531adde6d4 (patch)
treed01274504bf1a673a2a0154896fccb55cc92d3f1
parentc5143805386cf3b0fc76b4f537a231e1d027ef79 (diff)
downloadlwn-b779a07997536eb821ec3cbcee18ab531adde6d4.tar.gz
lwn-b779a07997536eb821ec3cbcee18ab531adde6d4.zip
KVM: PPC: Fix emulation of H_SET_DABR/X on POWER8
commit 760a7364f27d974d100118d88190e574626e18a6 upstream. In the old DABR register, the BT (Breakpoint Translation) bit is bit number 61. In the new DAWRX register, the WT (Watchpoint Translation) bit is bit number 59. So to move the DABR-BT bit into the position of the DAWRX-WT bit, it has to be shifted by two, not only by one. This fixes hardware watchpoints in gdb of older guests that only use the H_SET_DABR/X interface instead of the new H_SET_MODE interface. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--arch/powerpc/kvm/book3s_hv_rmhandlers.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index 818dce344e82..b3bad672e5d9 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -1805,7 +1805,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
/* Emulate H_SET_DABR/X on P8 for the sake of compat mode guests */
2: rlwimi r5, r4, 5, DAWRX_DR | DAWRX_DW
- rlwimi r5, r4, 1, DAWRX_WT
+ rlwimi r5, r4, 2, DAWRX_WT
clrrdi r4, r4, 3
std r4, VCPU_DAWR(r3)
std r5, VCPU_DAWRX(r3)