diff options
author | CQ Tang <cq.tang@intel.com> | 2016-01-13 21:15:03 +0000 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2016-02-25 11:58:55 -0800 |
commit | 01700c1d65b9bdd8ad3b1c82750e2c4b1e68d1c6 (patch) | |
tree | bed10330ea5346b777259477c47677c073e122f1 | |
parent | 2d8508e0ec05eedfad8aa72496f2eda551d59761 (diff) | |
download | lwn-01700c1d65b9bdd8ad3b1c82750e2c4b1e68d1c6.tar.gz lwn-01700c1d65b9bdd8ad3b1c82750e2c4b1e68d1c6.zip |
iommu/vt-d: Fix 64-bit accesses to 32-bit DMAR_GSTS_REG
commit fda3bec12d0979aae3f02ee645913d66fbc8a26e upstream.
This is a 32-bit register. Apparently harmless on real hardware, but
causing justified warnings in simulation.
Signed-off-by: CQ Tang <cq.tang@intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r-- | drivers/iommu/dmar.c | 2 | ||||
-rw-r--r-- | drivers/iommu/intel_irq_remapping.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/iommu/dmar.c b/drivers/iommu/dmar.c index 158156543410..2d7bb594626c 100644 --- a/drivers/iommu/dmar.c +++ b/drivers/iommu/dmar.c @@ -986,7 +986,7 @@ void dmar_disable_qi(struct intel_iommu *iommu) raw_spin_lock_irqsave(&iommu->register_lock, flags); - sts = dmar_readq(iommu->reg + DMAR_GSTS_REG); + sts = readl(iommu->reg + DMAR_GSTS_REG); if (!(sts & DMA_GSTS_QIES)) goto end; diff --git a/drivers/iommu/intel_irq_remapping.c b/drivers/iommu/intel_irq_remapping.c index ef5f65dbafe9..ffad080db013 100644 --- a/drivers/iommu/intel_irq_remapping.c +++ b/drivers/iommu/intel_irq_remapping.c @@ -489,7 +489,7 @@ static void iommu_disable_irq_remapping(struct intel_iommu *iommu) raw_spin_lock_irqsave(&iommu->register_lock, flags); - sts = dmar_readq(iommu->reg + DMAR_GSTS_REG); + sts = readl(iommu->reg + DMAR_GSTS_REG); if (!(sts & DMA_GSTS_IRES)) goto end; |