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authorDaniel Jurgens <danielj@mellanox.com>2016-10-27 16:36:41 +0300
committerJiri Slaby <jslaby@suse.cz>2016-11-24 16:23:58 +0100
commit577f7b9e99d1a86284a02792e038511293e56710 (patch)
treecfb6ab17eb28a7a9759886299248b462f91219b7
parent3ee9c742bb021ab292e97f1e26bf2a339b20310c (diff)
downloadlwn-577f7b9e99d1a86284a02792e038511293e56710.tar.gz
lwn-577f7b9e99d1a86284a02792e038511293e56710.zip
IB/mlx5: Use cache line size to select CQE stride
commit 16b0e0695a73b68d8ca40288c8f9614ef208917b upstream. When creating kernel CQs use 128B CQE stride if the cache line size is 128B, 64B otherwise. This prevents multiple CQEs from residing in a 128B cache line, which can cause retries when there are concurrent read and writes in one cache line. Tested with IPoIB on PPC64, saw ~5% throughput improvement. Fixes: e126ba97dba9 ('mlx5: Add driver for Mellanox Connect-IB adapters') Signed-off-by: Daniel Jurgens <danielj@mellanox.com> Signed-off-by: Maor Gottlieb <maorg@mellanox.com> Signed-off-by: Leon Romanovsky <leon@kernel.org> Signed-off-by: Doug Ledford <dledford@redhat.com> Signed-off-by: Jiri Slaby <jslaby@suse.cz>
-rw-r--r--drivers/infiniband/hw/mlx5/cq.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/infiniband/hw/mlx5/cq.c b/drivers/infiniband/hw/mlx5/cq.c
index 706833ab7e7e..e5a6d839f1d1 100644
--- a/drivers/infiniband/hw/mlx5/cq.c
+++ b/drivers/infiniband/hw/mlx5/cq.c
@@ -684,8 +684,7 @@ struct ib_cq *mlx5_ib_create_cq(struct ib_device *ibdev, int entries,
if (err)
goto err_create;
} else {
- /* for now choose 64 bytes till we have a proper interface */
- cqe_size = 64;
+ cqe_size = cache_line_size() == 128 ? 128 : 64;
err = create_cq_kernel(dev, cq, entries, cqe_size, &cqb,
&index, &inlen);
if (err)