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authorGary Bisson <bisson.gary@gmail.com>2014-12-03 15:03:51 -0800
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-01-27 07:52:33 -0800
commitb5d7c94c7cd9c6e4624dd4d2394ac5b407134dab (patch)
tree468bd77d46cf84ff95be3b4be15bf0b73058037d
parent9f172a02eeb0725091dba5931889f6d151ee7006 (diff)
downloadlwn-b5d7c94c7cd9c6e4624dd4d2394ac5b407134dab.tar.gz
lwn-b5d7c94c7cd9c6e4624dd4d2394ac5b407134dab.zip
ARM: clk-imx6q: fix video divider for rev T0 1.0
commit 81ef447950bf0955aca46f4a7617d8ce435cf0ce upstream. The post dividers do not work on i.MX6Q rev T0 1.0 so they must be fixed to 1. As the table index was wrong, a divider a of 4 could still be requested which implied the clock not to be set properly. This is the root cause of the HDMI not working at high resolution on rev T0 1.0 of the SoC. Signed-off-by: Gary Bisson <bisson.gary@gmail.com> Cc: <stable@vger.kernel.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--arch/arm/mach-imx/clk-imx6q.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index a1f5ea9e4b5e..2acaded8025d 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -301,7 +301,7 @@ int __init mx6q_clocks_init(void)
post_div_table[1].div = 1;
post_div_table[2].div = 1;
video_div_table[1].div = 1;
- video_div_table[2].div = 1;
+ video_div_table[3].div = 1;
}
/* type name parent_name base div_mask */