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| author | Tejun Heo <tj@kernel.org> | 2010-06-03 11:35:03 +0200 |
|---|---|---|
| committer | Jeff Garzik <jgarzik@redhat.com> | 2010-06-07 16:03:08 -0400 |
| commit | b475a3b83a7709e16a734ef2b8ead4d50f885427 (patch) | |
| tree | 9104b15848f68b8cc44fb414e115eabd3395d986 | |
| parent | 386f40c86d6c8d5b717ef20620af1a750d0dacb4 (diff) | |
| download | lwn-b475a3b83a7709e16a734ef2b8ead4d50f885427.tar.gz lwn-b475a3b83a7709e16a734ef2b8ead4d50f885427.zip | |
sata_via: explain the magic fix
Add Joseph Chan's explanation of the problem and workaround to the
VT6421 magic fix.
Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: Joseph Chan <JosephChan@via.com.tw>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| -rw-r--r-- | drivers/ata/sata_via.c | 18 |
1 files changed, 16 insertions, 2 deletions
diff --git a/drivers/ata/sata_via.c b/drivers/ata/sata_via.c index 0ecd0f6aa2c0..4730c42a5ee5 100644 --- a/drivers/ata/sata_via.c +++ b/drivers/ata/sata_via.c @@ -578,10 +578,24 @@ static void svia_configure(struct pci_dev *pdev) /* * vt6421 has problems talking to some drives. The following - * is the magic fix from Joseph Chan <JosephChan@via.com.tw>. - * Please add proper documentation if possible. + * is the fix from Joseph Chan <JosephChan@via.com.tw>. + * + * When host issues HOLD, device may send up to 20DW of data + * before acknowledging it with HOLDA and the host should be + * able to buffer them in FIFO. Unfortunately, some WD drives + * send upto 40DW before acknowledging HOLD and, in the + * default configuration, this ends up overflowing vt6421's + * FIFO, making the controller abort the transaction with + * R_ERR. + * + * Rx52[2] is the internal 128DW FIFO Flow control watermark + * adjusting mechanism enable bit and the default value 0 + * means host will issue HOLD to device when the left FIFO + * size goes below 32DW. Setting it to 1 makes the watermark + * 64DW. * * https://bugzilla.kernel.org/show_bug.cgi?id=15173 + * http://article.gmane.org/gmane.linux.ide/46352 */ if (pdev->device == 0x3249) { pci_read_config_byte(pdev, 0x52, &tmp8); |