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authorCarlos O'Donell <carlos@codesourcery.com>2010-02-22 23:25:59 +0000
committerGreg Kroah-Hartman <gregkh@suse.de>2010-05-12 14:57:13 -0700
commit5d233bf3dcad483e5f89865aaf5973e67c1630b1 (patch)
treef79bc0b64330c416a80483b1fb000ed0c733d75c
parenta899608c6a4c0ffd5219e7bf904b42aba0e6b9c1 (diff)
downloadlwn-5d233bf3dcad483e5f89865aaf5973e67c1630b1.tar.gz
lwn-5d233bf3dcad483e5f89865aaf5973e67c1630b1.zip
parisc: Set PCI CLS early in boot.
commit 5fd4514bb351b5ecb0da3692fff70741e5ed200c upstream. Set the PCI CLS early in the boot process to prevent device failures. In pcibios_set_master use the new pci_cache_line_size instead of a hard-coded value. Signed-off-by: Carlos O'Donell <carlos@codesourcery.com> Reviewed-by: Grant Grundler <grundler@google.com> Signed-off-by: Kyle McMartin <kyle@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-rw-r--r--arch/parisc/kernel/pci.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/arch/parisc/kernel/pci.c b/arch/parisc/kernel/pci.c
index f7064abc3bb6..9e74bfe071dc 100644
--- a/arch/parisc/kernel/pci.c
+++ b/arch/parisc/kernel/pci.c
@@ -18,7 +18,6 @@
#include <asm/io.h>
#include <asm/system.h>
-#include <asm/cache.h> /* for L1_CACHE_BYTES */
#include <asm/superio.h>
#define DEBUG_RESOURCES 0
@@ -123,6 +122,10 @@ static int __init pcibios_init(void)
} else {
printk(KERN_WARNING "pci_bios != NULL but init() is!\n");
}
+
+ /* Set the CLS for PCI as early as possible. */
+ pci_cache_line_size = pci_dfl_cache_line_size;
+
return 0;
}
@@ -171,7 +174,7 @@ void pcibios_set_master(struct pci_dev *dev)
** upper byte is PCI_LATENCY_TIMER.
*/
pci_write_config_word(dev, PCI_CACHE_LINE_SIZE,
- (0x80 << 8) | (L1_CACHE_BYTES / sizeof(u32)));
+ (0x80 << 8) | pci_cache_line_size);
}