diff options
author | wchen <waylingii@gmail.com> | 2023-05-20 23:01:16 +0800 |
---|---|---|
committer | Anup Patel <anup@brainfault.org> | 2023-06-06 09:04:11 +0530 |
commit | 19bff88e65b552f54c191e600498bd50ff47e1ef (patch) | |
tree | b7b06a0ac002f1773476916f9d3c6079dadaba78 | |
parent | 78329084b86436b9a77cedd3e1331734c442d413 (diff) | |
download | lwn-19bff88e65b552f54c191e600498bd50ff47e1ef.tar.gz lwn-19bff88e65b552f54c191e600498bd50ff47e1ef.zip |
RISC-V: KVM: Redirect AMO load/store misaligned traps to guest
The M-mode redirects an unhandled misaligned trap back
to S-mode when not delegating it to VS-mode(hedeleg).
However, KVM running in HS-mode terminates the VS-mode
software when back from M-mode.
The KVM should redirect the trap back to VS-mode, and
let VS-mode trap handler decide the next step.
Here is a way to handle misaligned traps in KVM,
not only directing them to VS-mode or terminate it.
Signed-off-by: wchen <waylingII@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Anup Patel <anup@brainfault.org>
-rw-r--r-- | arch/riscv/include/asm/csr.h | 2 | ||||
-rw-r--r-- | arch/riscv/kvm/vcpu_exit.c | 2 |
2 files changed, 4 insertions, 0 deletions
diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h index b6acb7ed115f..917814a0f99e 100644 --- a/arch/riscv/include/asm/csr.h +++ b/arch/riscv/include/asm/csr.h @@ -82,7 +82,9 @@ #define EXC_INST_ACCESS 1 #define EXC_INST_ILLEGAL 2 #define EXC_BREAKPOINT 3 +#define EXC_LOAD_MISALIGNED 4 #define EXC_LOAD_ACCESS 5 +#define EXC_STORE_MISALIGNED 6 #define EXC_STORE_ACCESS 7 #define EXC_SYSCALL 8 #define EXC_HYPERVISOR_SYSCALL 9 diff --git a/arch/riscv/kvm/vcpu_exit.c b/arch/riscv/kvm/vcpu_exit.c index 4ea101a73d8b..2415722c01b8 100644 --- a/arch/riscv/kvm/vcpu_exit.c +++ b/arch/riscv/kvm/vcpu_exit.c @@ -183,6 +183,8 @@ int kvm_riscv_vcpu_exit(struct kvm_vcpu *vcpu, struct kvm_run *run, run->exit_reason = KVM_EXIT_UNKNOWN; switch (trap->scause) { case EXC_INST_ILLEGAL: + case EXC_LOAD_MISALIGNED: + case EXC_STORE_MISALIGNED: if (vcpu->arch.guest_context.hstatus & HSTATUS_SPV) { kvm_riscv_vcpu_trap_redirect(vcpu, trap); ret = 1; |