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authorDouglas Anderson <dianders@chromium.org>2022-12-09 09:12:37 -0800
committerBjorn Andersson <andersson@kernel.org>2022-12-27 21:31:47 -0600
commit9506a3661258d07a60b186f667b391708ddf63ac (patch)
treefdfe1e333487ec1cdefd9e3ad492fbc6be00f84f
parent1c170714490e4d8c0886019145c9d90dfade14f9 (diff)
downloadlwn-9506a3661258d07a60b186f667b391708ddf63ac.tar.gz
lwn-9506a3661258d07a60b186f667b391708ddf63ac.zip
arm64: dts: qcom: sc7180: Bump up trogdor ts_reset_l drive strength
On at least one board (pazquel360) the reset line for the touchscreen was scoped and found to take almost 2 ms to fall when we drove it low. This wasn't great because the Linux driver for the touchscreen (the elants_i2c driver) thinks it can do a 500 us reset pulse. If we bump the drive strength to 8 mA then the reset line went down in ~421 us. NOTE: we could apply this fix just for pazquel360, but: * Probably other trogdor devices have similar timings and it's just that nobody has noticed it before. * There are other trogdor boards using the same elan driver that tries to do 500 us reset pulses. * Bumping the drive strength to 8mA across the board won't hurt. This isn't a high speed signal or anything. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221209091234.v3.1.I39c387f1e3176fcf340039ec12d54047de9f8526@changeid
-rw-r--r--arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi10
1 files changed, 9 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
index d134d172a3c5..670a7d174e5d 100644
--- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
@@ -1394,7 +1394,15 @@ ap_spi_fp: &spi10 {
pins = "gpio8";
function = "gpio";
bias-disable;
- drive-strength = <2>;
+
+ /*
+ * The reset GPIO to the touchscreen takes almost 2ms to drop
+ * at the default drive strength. When we bump it up to 8mA it
+ * falls in under 500us. We want this to be fast since the Elan
+ * datasheet (and any drivers written based on it) talk about using
+ * a 500 us reset pulse.
+ */
+ drive-strength = <8>;
};
sdc1_on: sdc1-on-state {