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author | Pascal van Leeuwen <pascalvanl@gmail.com> | 2019-11-06 16:13:07 +0100 |
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committer | Herbert Xu <herbert@gondor.apana.org.au> | 2019-11-17 08:37:29 +0800 |
commit | c3510fec6e824cd7ab75f77c80412b746928aa2b (patch) | |
tree | 8743afa0f67cb07f11278462ec4c1f6205bba1ca | |
parent | 6d01d8511dceb9cd40f72eb102b7d24f0b2e997b (diff) | |
download | lwn-c3510fec6e824cd7ab75f77c80412b746928aa2b.tar.gz lwn-c3510fec6e824cd7ab75f77c80412b746928aa2b.zip |
crypto: inside-secure - Fix hangup during probing for EIP97 engine
Fixed mask used for CFSIZE and RFSIZE fields of HIA_OPTIONS register,
these were all 1 bit too wide. Which caused the probing of a standard
EIP97 to actually hang due to assume way too large descriptor FIFO's.
Signed-off-by: Pascal van Leeuwen <pvanleeuwen@verimatrix.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
-rw-r--r-- | drivers/crypto/inside-secure/safexcel.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/crypto/inside-secure/safexcel.h b/drivers/crypto/inside-secure/safexcel.h index ba03e4daf64c..b4624b5687ce 100644 --- a/drivers/crypto/inside-secure/safexcel.h +++ b/drivers/crypto/inside-secure/safexcel.h @@ -257,13 +257,13 @@ #define EIP197_CFSIZE_OFFSET 9 #define EIP197_CFSIZE_ADJUST 4 #define EIP97_CFSIZE_OFFSET 8 -#define EIP197_CFSIZE_MASK GENMASK(3, 0) -#define EIP97_CFSIZE_MASK GENMASK(4, 0) +#define EIP197_CFSIZE_MASK GENMASK(2, 0) +#define EIP97_CFSIZE_MASK GENMASK(3, 0) #define EIP197_RFSIZE_OFFSET 12 #define EIP197_RFSIZE_ADJUST 4 #define EIP97_RFSIZE_OFFSET 12 -#define EIP197_RFSIZE_MASK GENMASK(3, 0) -#define EIP97_RFSIZE_MASK GENMASK(4, 0) +#define EIP197_RFSIZE_MASK GENMASK(2, 0) +#define EIP97_RFSIZE_MASK GENMASK(3, 0) /* EIP197_HIA_AIC_R_ENABLE_CTRL */ #define EIP197_CDR_IRQ(n) BIT((n) * 2) |