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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2015-07-06 15:10:05 +0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-08-14 18:16:38 +0200 |
| commit | a79b8165beed02a96dc54737feb20700ddf71127 (patch) | |
| tree | f71e9a7506f60bbfbc1a9406f7f7c61e6772dd37 | |
| parent | 90a6b7b052b1aa17fbb98b049e9c8b7f729c35a7 (diff) | |
| download | lwn-a79b8165beed02a96dc54737feb20700ddf71127.tar.gz lwn-a79b8165beed02a96dc54737feb20700ddf71127.zip | |
drm/i915: Don't use link_bw to select between TP1 and TP3
intel_dp->link_bw is going away, so consul the port_clock instead when
choosing between TP1 and TP3.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| -rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 3d3a908ac2f2..6231eb14fb76 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -3734,8 +3734,8 @@ intel_dp_complete_link_train(struct intel_dp *intel_dp) uint32_t DP = intel_dp->DP; uint32_t training_pattern = DP_TRAINING_PATTERN_2; - /* Training Pattern 3 for HBR2 ot 1.2 devices that support it*/ - if (intel_dp->link_bw == DP_LINK_BW_5_4 || intel_dp->use_tps3) + /* Training Pattern 3 for HBR2 or 1.2 devices that support it*/ + if (crtc->config->port_clock == 540000 || intel_dp->use_tps3) training_pattern = DP_TRAINING_PATTERN_3; /* channel equalization */ |