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| author | Emilio López <emilio@elopez.com.ar> | 2013-12-23 00:32:32 -0300 |
|---|---|---|
| committer | Emilio López <emilio@elopez.com.ar> | 2013-12-28 17:07:42 -0300 |
| commit | 40a5dcba4e79023f0b511dc0ca498bdf9eacb5db (patch) | |
| tree | cb8669f36dde36c379ae806f3c54e2e1c0d87efb /.gitignore | |
| parent | 0903ea60173fab226a867ceb080b2e0269a6c975 (diff) | |
| download | lwn-40a5dcba4e79023f0b511dc0ca498bdf9eacb5db.tar.gz lwn-40a5dcba4e79023f0b511dc0ca498bdf9eacb5db.zip | |
clk: sunxi: register factors clocks behind composite
This commit reworks factors clock registration to be done behind a
composite clock. This allows us to additionally add a gate, mux or
divisors, as it will be needed by some future PLLs.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to '.gitignore')
0 files changed, 0 insertions, 0 deletions