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2026-09-25drm/xe: Add ULLS migration job support to migration layerMatthew Brost
Add function to enter ULLS mode for migration job and delayed worker to exit (power saving). ULLS mode expected to entered upon page fault or SVM prefetch. ULLS mode exit delay is currently set to 5ms. ULLS mode only support on DGFX and USM platforms where a hardware engine is reserved for migrations jobs. When in ULLS mode, set several flags on migration jobs so submission backend / ring ops can properly submit in ULLS mode. Upon ULLS mode enter, send a job trigger waiting a semphore pipling initial GuC / HW conetxt switch. Upon ULLS mode exit, send a job to trigger that current ULLS semaphore so the ring can be taken off the hardware. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Maarten Lankhorst <dev@lankhorst.se> Link: https://patch.msgid.link/20260925201526.1355279-20-matthew.brost@intel.com
2026-09-25drm/xe: Add ULLS support to LRCMatthew Brost
Define memory layout for ULLS semaphores stored in LRC memory. Add support functions to return GGTT address and set semaphore based on a job's seqno. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com> Reviewed-by: Maarten Lankhorst <dev@lankhorst.se> Link: https://patch.msgid.link/20260925201526.1355279-19-matthew.brost@intel.com
2026-09-25drm/xe: Add device flag to enable PT mirroring across tilesMatthew Brost
Some multi-tile devices may want to mirror page tables across tiles for memory-bandwidth reasons, while others may not. Add a device flag that allows enabling or disabling page-table mirroring across tiles. Setting the flag to true (the existing behavior) on PVC, but both modes have been tested and are working on PVC. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Maarten Lankhorst <dev@lankhorst.se> Reviewed-by: Francois Dugast <francois.dugast@intel.com> Link: https://patch.msgid.link/20260925201526.1355279-18-matthew.brost@intel.com
2026-09-25drm/xe: Add CPU bind layerMatthew Brost
With CPU binds, it no longer makes sense to implement CPU bind handling in the migrate layer, as these operations are entirely decoupled from hardware. Introduce a dedicated CPU bind layer stored at the device level. Since CPU binds are tile-independent, update the PT layer to generate a single bind job even when pages are mirrored across tiles. This patch is large because the refactor touches multiple file / layers and ensures functional equivalence before and after the change. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com> Reviewed-by: Shuicheng Lin <shuicheng.lin@intel.com> Reviewed-by: Maarten Lankhorst <dev@lankhorst.se> Link: https://patch.msgid.link/20260925201526.1355279-17-matthew.brost@intel.com
2026-09-25drm/xe: Make bind queues operate cross-tileMatthew Brost
Since bind jobs execute on the CPU rather than the GPU, maintaining a per-tile bind queue no longer provides value. Convert the driver to use a single bind queue shared across tiles. The primary change is routing all GT TLB invalidations through this unified bind queue. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Shuicheng Lin <shuicheng.lin@intel.com> Reviewed-by: Maarten Lankhorst <dev@lankhorst.se> Link: https://patch.msgid.link/20260925201526.1355279-16-matthew.brost@intel.com
2026-09-25drm/xe: Remove unused arguments from xe_migrate_pt_update_opsMatthew Brost
Both populate and clear have unused void* ptr arguments, remove these. Also consolidate ofs, num_qwords in update argument. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Shuicheng Lin <shuicheng.lin@intel.com> Reviewed-by: Maarten Lankhorst <dev@lankhorst.se> Link: https://patch.msgid.link/20260925201526.1355279-15-matthew.brost@intel.com
2026-09-25drm/xe: Enable CPU binds for jobsMatthew Brost
No reason to use the GPU for binds. Benefits of CPU-based binds: - Lower latency once dependencies are resolved, as there is no interaction with the GuC or a hardware context switch both of which are relatively slow. - Large arrays of binds do not risk running out of migration PTEs, avoiding -ENOBUFS being returned to userspace. - Kernel binds are decoupled from the migration exec queue (which issues copies and clears), so they cannot get stuck behind unrelated jobs—this can be a problem with parallel GPU faults. - Paves the for path decouping binds from tiles and individual engines - Enables ULLS on the migration exec queue, as this queue has exclusive access to the paging copy engine. Update migration layer to formulate a PT job which will issue CPU bind in the submission backend. All code related to GPU-based binding has been removed. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com> Reviewed-by: Maarten Lankhorst <dev@lankhorst.se> Link: https://patch.msgid.link/20260925201526.1355279-14-matthew.brost@intel.com
2026-09-25drm/xe: Don't use migrate exec queue for page fault bindsMatthew Brost
Now that the CPU is always used for binds even in jobs, CPU bind jobs can pass GPU jobs in the same exec queue resulting dma-fences signaling out-of-order. Use a dedicated exec queue for binds issued from page faults to avoid ordering issues and avoid blocking kernel binds on unrelated copies / clears. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com> Reviewed-by: Maarten Lankhorst <dev@lankhorst.se> Link: https://patch.msgid.link/20260925201526.1355279-13-matthew.brost@intel.com
2026-09-25drm/xe: Store level in struct xe_vm_pgtable_updateMatthew Brost
The level was previously extracted from struct xe_pt inside xe_vm_pgtable_update during CPU binds, which always occurred during the bind IOCTL. With CPU binds now supported in bind jobs, struct xe_pt may no longer be valid in memory at that point. To address this, store the level directly in struct xe_vm_pgtable_update. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Stuart Summers <stuart.summers@intel.com> Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com> Reviewed-by: Maarten Lankhorst <dev@lankhorst.se> Link: https://patch.msgid.link/20260925201526.1355279-12-matthew.brost@intel.com
2026-09-25drm/xe: Update GuC submission backend to run PT jobsMatthew Brost
PT jobs bypass GPU execution for the final step of a bind job, using the CPU to program the required page tables. Teach the GuC submission backend how to execute these jobs. PT job submission is implemented in the GuC backend for simplicity. A follow-up patch could introduce a dedicated backend for PT jobs. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Maarten Lankhorst <dev@lankhorst.se> Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com> Link: https://patch.msgid.link/20260925201526.1355279-11-matthew.brost@intel.com
2026-09-25drm/xe: Add struct xe_pt_job_opsMatthew Brost
Add struct xe_pt_job_ops, a dynamically refcounted object that contains the information required to issue a CPU bind via a job after the initial bind IOCTL returns. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com> Reviewed-by: Maarten Lankhorst <dev@lankhorst.se> Link: https://patch.msgid.link/20260925201526.1355279-10-matthew.brost@intel.com
2026-09-25drm/xe: Add helpers to access PT opsMatthew Brost
Add helpers to access PT ops, making it easier to shuffle the location of the ops structures without requiring widespread code changes. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Francois Dugast <francois.dugast@intel.com> Reviewed-by: Maarten Lankhorst <dev@lankhorst.se> Link: https://patch.msgid.link/20260925201526.1355279-9-matthew.brost@intel.com
2026-09-25drm/xe: Update scheduler job layer to support PT jobsMatthew Brost
Update the scheduler job layer to support PT jobs. PT jobs are executed entirely on the CPU and do not require LRC fences or a batch address. Repurpose the LRC fence storage to hold PT‑job arguments and update the scheduler job layer to distinguish between PT jobs and jobs that require an LRC. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Maarten Lankhorst <dev@lankhorst.se> Reviewed-by: Francois Dugast <francois.dugast@intel.com> Link: https://patch.msgid.link/20260925201526.1355279-8-matthew.brost@intel.com
2026-09-25drm/xe: Update xe_bo_put_deferred arguments to include writeback flagMatthew Brost
Update the xe_bo_put_deferred arguments to include a writeback flag, which indicates whether the BO was added to the deferred list. This is useful when the caller needs to take additional actions after the BO has been queued for deferred release. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Francois Dugast <francois.dugast@intel.com> Reviewed-by: Maarten Lankhorst <dev@lankhorst.se> Link: https://patch.msgid.link/20260925201526.1355279-7-matthew.brost@intel.com
2026-09-25drm/xe: Add job count to GuC exec queue snapshotMatthew Brost
Add the job count to the GuC exec queue snapshot, as this is useful debug information. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Stuart Summers <stuart.summers@intel.com> Reviewed-by: Maarten Lankhorst <dev@lankhorst.se> Link: https://patch.msgid.link/20260925201526.1355279-6-matthew.brost@intel.com
2026-09-25drm/xe: Decouple exec queue idle check from LRCMatthew Brost
We already maintain a job count for each exec queue, so simplify the idle check to rely on the job count rather than the LRC state. This decouples exec queues from LRC-based backends and avoids unnecessarily coupling idle detection to backend-specific implementation details. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Stuart Summers <stuart.summers@intel.com> Reviewed-by: Maarten Lankhorst <dev@lankhorst.se> Link: https://patch.msgid.link/20260925201526.1355279-5-matthew.brost@intel.com
2026-09-25drm/xe: Add xe_migrate_update_pgtables_cpu_execute helperMatthew Brost
Add the xe_migrate_update_pgtables_cpu_execute helper, which performs the CPU-side page-table update. This will support implementing CPU binds, as the submission backend can call this helper once a bind job’s dependencies are resolved. While here, add assertions to provide basic sanity checks on tht function arguments. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Francois Dugast <francois.dugast@intel.com> Reviewed-by: Maarten Lankhorst <dev@lankhorst.se> Link: https://patch.msgid.link/20260925201526.1355279-4-matthew.brost@intel.com
2026-09-25drm/xe: Drop struct xe_migrate_pt_update argument from populate/clear vfunsMatthew Brost
Remove the xe_migrate_pt_update argument from the populate and clear vfuns. This structure will not be available in run_job, where CPU binds will be implemented. The populate path no longer needs it, and the clear path already uses the VM field instead. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Francois Dugast <francois.dugast@intel.com> Reviewed-by: Maarten Lankhorst <dev@lankhorst.se> Link: https://patch.msgid.link/20260925201526.1355279-3-matthew.brost@intel.com
2026-09-25drm/xe: reference VM from PT BOsMatthew Brost
PT BOs share the VM's dma-resv and therefore must keep the VM alive until all PT BOs are destroyed.   Take a VM reference from PT BOs to ensure the shared dma-resv remains valid for the lifetime of the BOs. Scope the change to PT BOs rather than all kernel BOs to minimize risk and avoid extending VM lifetimes unnecessarily. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Maarten Lankhorst <dev@lankhorst.se> Reviewed-by: Francois Dugast <francois.dugast@intel.com> Link: https://patch.msgid.link/20260925201526.1355279-2-matthew.brost@intel.com
2026-09-25net: dsa: motorcomm: Add SerDes PCSDavid Yang
Support in-band negotiation of the SerDes ports. Signed-off-by: David Yang <mmyangfl@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20260923021945.2203368-9-mmyangfl@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-09-25net: dsa: motorcomm: Split MDIO bus moduleDavid Yang
Split it in order to be used in other modules. Signed-off-by: David Yang <mmyangfl@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20260923021945.2203368-8-mmyangfl@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-09-25net: dsa: motorcomm: Hoist port_to_priv helper into chip.hDavid Yang
yt921x_poll_mib() open-codes the same container_of_const() expression that leds.c defines as to_yt921x_priv(). Move the macro to chip.h as yt921x_port_to_priv() so both files use one definition. Signed-off-by: David Yang <mmyangfl@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20260923021945.2203368-7-mmyangfl@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-09-25net: dsa: motorcomm: Introduce yt921x_speedDavid Yang
FIELD_PREP values cannot be used as case labels. Introduce enum for future use. Signed-off-by: David Yang <mmyangfl@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20260923021945.2203368-6-mmyangfl@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-09-25net: dsa: motorcomm: Fix register bit field namesDavid Yang
Review and fix the incorrectness in the bit field names. No functional change. Signed-off-by: David Yang <mmyangfl@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20260923021945.2203368-5-mmyangfl@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-09-25net: dsa: motorcomm: Identify port type at runtimeDavid Yang
The yt921x_port_is_internal/external() macros hardcoded the port layout: they treat ports 8 and 9 as external on every chip and count the dummy ports as internal. Identify the actual port capabilities using chip info and track configuration of external ports (although only SerDes is supported now). This is a hardening and cleanup step ahead of the SerDes PCS support, no behavior changes intended. Signed-off-by: David Yang <mmyangfl@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20260923021945.2203368-4-mmyangfl@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-09-25net: dsa: motorcomm: Split xMII and SERDES port masksDavid Yang
Replace external_mask with xmii_mask and serdes_mask, and advertise the interface modes it actually supports. Also move struct yt921x_info into chip.h for future use. Signed-off-by: David Yang <mmyangfl@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20260923021945.2203368-3-mmyangfl@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-09-25net: dsa: motorcomm: Remove YT921X_PORT_MASK_* macrosDavid Yang
Remove YT921X_PORT_MASK_* macros since they are only thin wrappers around BIT() and GENMASK() and are not used in other places (plain BIT() and GENMASK() are used there). No functional change. Signed-off-by: David Yang <mmyangfl@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20260923021945.2203368-2-mmyangfl@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-09-25net: macb: add support for 1000BASE-X autonegotiation to PCSNathan Whitehorn
The current PCS code unconditionally uses SGMII autonegotiation, though the hardware supports both SGMII and 1000BASE-X modes. Decouple the choice of PCS enablement from use of the SGMII mode when running at gigabit rates and announce to phylink that 1000BASE-X is a supported operating mode. This enables direct attachment of the PCS to e.g. an SFP. The 1000BASE-X code in phylink also sometimes calls the autonegotiation restart method, so add an implementation of autonegotiation restart and make sure that pcs_config() signals to phylink when the AN advertisement has changed. Signed-off-by: Nathan Whitehorn <nwhitehorn@pa.msu.edu> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20260922151429.23272-3-nwhitehorn@pa.msu.edu Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-09-25net: macb: Poll for link state changes when using the internal PCS.Nathan Whitehorn
When used with an offboard transceiver (e.g. an SFP), link state needs to be measured at the PCS rather than an onboard PHY. Poll the link state when the PCS is active to allow the kernel to detect link state changes in this case. Signed-off-by: Nathan Whitehorn <nwhitehorn@pa.msu.edu> Reviewed-by: Théo Lebrun <theo.lebrun@bootlin.com> Link: https://patch.msgid.link/20260922151429.23272-2-nwhitehorn@pa.msu.edu Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-09-25ptp: idt82p33: Stop PTP work producers before teardownYibo Tan
idt82p33_ptp_clock_unregister_all() cancels each channel's adjtime work before unregistering its PTP clock. An adjustment callback already in progress can schedule that work after cancellation returns. Device removal then frees the channel while its delayed work remains queued, causing a use-after-free. Mark the device as stopping under its lock before draining work. Reject new adjustment and EXTS requests, clear the EXTS polling mask, and synchronously drain the EXTS and channel adjustment work before the device storage is released. With an i2c-stub device and kprobe-controlled callback timing, three runs of the unmodified driver reported KASAN use-after-free after unbind. Three runs with this change completed without a kernel diagnostic. No physical IDT82P33 device was tested. Cc: stable+noautosel@kernel.org # untested fix to a driver init path race Signed-off-by: Yibo Tan <lhfff@tju.edu.cn> Link: https://patch.msgid.link/20260922113601.855416-1-lhfff@tju.edu.cn Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-09-25net: ethernet: ravb: Add gPTP support for Gen4Niklas Söderlund
While driver advertises gPTP support on Gen4 platforms it is in fact completely broken. On R-Car Gen4 devices the RAVB module have no internal gPTP clock as generations before it. Instead it utilizes a system-wide gPTP clock. This change utilizes the refactoring of the RAVB gPTP code to add support for a system-wide clock and stops the Gen4 devices trying to use the non-existing internal gPTP clock. To remain backward compatible the ptp-timer property is optional.If not present, or not enabled, the RAVB driver will no longer advertise gPTP support to user-space. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Sergey Shtylyov <sergei.shtylyov@gmail.com> Link: https://patch.msgid.link/20260921175037.4084310-11-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-09-25net: ethernet: ravb: Add callback for gPTP clock indexNiklas Söderlund
Prepare for adding Gen4 support which have an optional external gPTP clock. Add a callback to get the clock index and use it to determine if the device shall report gPTP support. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Sergey Shtylyov <sergei.shtylyov@gmail.com> Link: https://patch.msgid.link/20260921175037.4084310-9-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-09-25net: ethernet: ravb: Add callback for gPTP probeNiklas Söderlund
Different generations of the RAVB IP have different needs when it probes the gPTP timer clock. Add a callback in the PTP information to allow each generation to probe its own way. With this the last gPTP specific flag (gptp_ref_clk) can be removed. However the primary motivation for the change is to prepare for Gen4 support, which compared to other generations with gPTP support does not have the clock as part of the IP itself. Gen4 will not need to compute GTI value as it have nowhere to write it, as the gPTP clock is external. For this reason move the computation of it into the newly gPTP probe specific callbacks for the RAVB IP's that support it. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Sergey Shtylyov <sergei.shtylyov@gmail.com> Link: https://patch.msgid.link/20260921175037.4084310-8-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-09-25net: ethernet: ravb: Replace gPTP flags with callbacksNiklas Söderlund
Prepare for adding Gen4 support which will add a third and new way to interact with the gPTP clock by replacing the flags for Gen2 behavior (info->gptp) and Gen3 behavior (info->ccc_gac) with callbacks. This will make adding Gen4 support cleaner as the code will not have "if else if else" sprinkled all over to handle each generations special cases. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Sergey Shtylyov <sergei.shtylyov@gmail.com> Link: https://patch.msgid.link/20260921175037.4084310-7-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-09-25net: ethernet: ravb: Propagate error from ptp_clock_register()Niklas Söderlund
If the PTP clock registration failed the error is silently ignored. Before reworking all callers of ravb_ptp_init() handle and propagate the error so it can be used. Link: https://sashiko.dev/#/patchset/20260610102432.3538432-2-niklas.soderlund+renesas@ragnatech.se?part=1 Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Sergey Shtylyov <sergei.shtylyov@gmail.com> Link: https://patch.msgid.link/20260921175037.4084310-6-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-09-25net: ethernet: ravb: Remove redundant argument to ravb_ptp_init()Niklas Söderlund
There is no need to explicitly pass the struct platform_device pointer to ravb_ptp_init(), it can retrieve it directly from the private data structure. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Sergey Shtylyov <sergei.shtylyov@gmail.com> Link: https://patch.msgid.link/20260921175037.4084310-5-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-09-25net: ethernet: ravb: Simplify gPTP start and stopNiklas Söderlund
For devices that do not support the gPTP clock in config mode the somewhat oddly named flag gptp is set, compared to devices that do support the gPTP clock in config and operation mode where the flag ccc_gac is set instead. The two flags are mutually exclusive. For the gptp-flag devices (Gen2) the clock is tied to the AVB-DMAC, when it is stopped so is the gPTP clock. For ccc_gac-flag devices (Gen3) the gPTP clock is available whenever the ndev is open. Prepare to add Gen4 support which will add a third way by cleaning the Gen2 and Gen3 cases up a bit. Fold the gptp-flag start and stop calls into ravb_dmac_init() and ravb_stop_dma(), which start and stop the AVB-DMAC. There are no functional change as all call sites to the construct: if (info->gptp) ravb_ptp_init(ndev, priv->pdev); are always just after a call to into ravb_dmac_init() and all call sites to the construct: if (info->gptp) ravb_ptp_stop(ndev); are always directly followed by a call to ravb_stop_dma(). There are two special cases where the calling construct covers both the gptp-flag and info->ccc_gac devices, one for start and one for stop. The condition that it is preceded by a call to ravb_dmac_init(), or followed by a call to ravb_stop_dma() are however true for them too. Reworked the two special cases to drop the check of info->gptp. The end result is that the gPTP clock will be started or stopped for the gptp-flag devices in tandem with the AVB-DMAC, while the info->ccc_gac devices will be controlled, as before, when the ndev is opened or closed. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Sergey Shtylyov <sergei.shtylyov@gmail.com> Link: https://patch.msgid.link/20260921175037.4084310-4-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-09-25net: ethernet: ravb: Move programming of gPTP timer intervalNiklas Söderlund
Commit f384ab481cab ("net: ravb: Split GTI computation and set operations") broke apart the operations of computing the timer interval and programming of it. However it kept the programming of the interval in the RAVB main logic. Having split the two apart this can be improved further by moving the programming to the gPTP initialization function, as the first action of the gPTP init function is to wait for the timer interval programming to be acknowledge by the hardware. As an added bonus the interaction with the gPTP registers for the programming can then also be done while holding the gPTP registers lock. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Sergey Shtylyov <sergei.shtylyov@gmail.com> Link: https://patch.msgid.link/20260921175037.4084310-3-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-09-25net: ethernet: ravb: Remove gPTP control from WoL setup and restoreNiklas Söderlund
Since commit a6a85ba36fd0 ("net: ravb: Move PTP initialization in the driver's ndo_open API for ccc_gac platorms") the gPTP clock (if supported) is stopped and started by opening and closing the ndev. This makes the special case to stop and start it when resuming from WoL redundant. As the ndev will always be closed and re-opened when resuming the system. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Sergey Shtylyov <sergei.shtylyov@gmail.com> Link: https://patch.msgid.link/20260921175037.4084310-2-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-09-25netdevsim: support reporting RSS key, indirection table, and flow hash fieldsEric Dumazet
Initialize a per-device RSS key in nsim_ethtool_init() using netdev_rss_key_fill() and wire up get_rxfh_key_size, get_rxfh_indir_size, get_rxfh, and get_rxfh_fields on nsim_ethtool_ops. This allows RSS selftests under tools/testing/selftests/drivers/net/ to exercise both /proc/sys/net/core/netdev_rss_key and ethtool netlink RSS reporting against netdevsim without requiring physical hardware. Signed-off-by: Eric Dumazet <edumazet@google.com> Link: https://patch.msgid.link/20260922163458.3900996-4-edumazet@google.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-09-26kbuild: avoid re-running compiler and linker probesLorenzo Stoakes (ARM)
Each kernel make invocation begins with ~30 compiler and linker runs each of which performs duplicate probe for a number of compiler and linker options. This is useless work - the compiler and its version is known, so use these to determine which options are available, once. Using the newly introduced cc-option-str, track the result of each probe in CC_OPT_*, LD_OPT_* variables and have Makefile's simply append the symbol. Some care has to be taken around negative options, i.e. -Wno-xxx, as gcc accepts an unknown -Wno- without complaint and only complains later, so instead probe the positive form for these cases. Use CC_HAS_* For those probes that gate a Makefile conditional rather than a simple option, as per the established pattern for this. This change avoids a subtle issue with ppc32 (big endian) - clang doesn't accept -fno-stack-clash-protection on this sub-target, so keep this option in the Makefile. With gcc and clang, defconfig and allmodconfig, the recorded command lines are unchanged, a build with nothing to do rebuilds nothing and W=1 continues to function correctly. Doing this improves all builds, but has a particularly positive impact on no-op builds (builds where nothing has changed). Whole build, 128-thread Threadripper 9980X, best of N runs: before after delta ------------------------------- x86 defconfig, no-op make, gcc 0.78s 0.60s -0.18s (-23%) x86 defconfig, no-op make, clang 0.94s 0.66s -0.28s (-30%) x86 defconfig, touch mm/vma.c, gcc 8.6s 8.5s -0.16s (-2%) x86 defconfig, touch mm/vma.c, clang 8.0s 7.7s -0.24s (-3%) x86 defconfig, clean, clang 29.8s 29.4s -0.37s (-1%) x86 allmodconfig, no-op make, gcc 12.9s 12.7s -0.23s (-2%) x86 allmodconfig, no-op make, clang 14.2s 13.9s -0.29s (-2%) x86 allmodconfig, touch mm/vma.c, clang 32.2s 31.9s -0.30s (-1%) Assisted-by: LLM Signed-off-by: Lorenzo Stoakes (ARM) <ljs@kernel.org> Link: https://patch.msgid.link/20260923-build-speedup-v4-12-73128809a4a4@kernel.org Signed-off-by: Nathan Chancellor <nathan@kernel.org>
2026-09-25Merge tag 'drm-fixes-2026-09-26' of https://gitlab.freedesktop.org/drm/kernelLinus Torvalds
Pull drm fixes from Dave Airlie: "While most of this is AI inspired fixes for error handling paths, leaks and use after frees, there are some normal things. nouveau has probably the biggest changes with some fixes to stabilise runtime suspend/resume on 570 firmware which regressed after we moved from 535, there are some fixes to stackframe issues seen with amdgpu, and otherwise the usual bunch of i915/xe/amdgpu fixes, and some virtio-gpu fixes. Hopefully it will start to quiten down a bit from here. client: - fix restore of partially initialized client i915: - Fix incorrect RCU teardown order leading to endless loop - Fix DP MST TU and FEC handling for disconnected streams - Fix selective fetch disable, again - Fix export namespace for kunit helpers - Workaround eDP flicker on a specific laptop model xe: - CRI throttle reasons report - TLB invalidation at wedge - SVM eviction and VM close - Display corruption on LNL on Xen PV - W/a fix and addition amdgpu: - Display ref count fix - Userq fixes - VCN 4, 5 reset fixes - Fixes for various error paths - Stack frame size fixes for various combinations of compilers and configs amdkfd: - Possible UAF fix nouveau: - runtime suspend/resume fixes for newer firmware - rcu free the scheduler - fix VRAM pinning - fix double free - fix reference leaks - fix runtime PM leak - fix cursor list usage problems - fix HDMI config rejection without SCDC virtio: - fix a bunch of object/memory leaks in failure paths - add pixel blend mode property to cursor plane - revert prime buffers import - sync shmem backing on guest transfers imagination: - propogate map failures properly - fix page count in map interface - clamp freelist reconstruction requests ivpu: - use separate flag for job timeout bridge: - samsung-dsim: fix TE GPIO lifetime for host attach" * tag 'drm-fixes-2026-09-26' of https://gitlab.freedesktop.org/drm/kernel: (60 commits) drm/amd/display: Bump frame warning limit for all builds of dml drm/imagination: clamp freelist reconstruction requests drm/imagination: Fix page count for page table for map() interface drm/imagination: Propagate map failures correctly from pvr_mmu_map_sgl() drm/amd/display: Bump frame warning limit for clang builds of dml drm/amd/display: Relax DML frame limit with UBSAN drm/amdgpu: Fix runtime PM leak in amdgpu_debugfs_test_ib_show() drm/amdgpu: Fix last_update fence leak in amdgpu_vm_init() drm/amdgpu: Fix acpi device leak in amdgpu_acpi_enumerate_xcc() drm/amdgpu: Fix vmid_wait fence leak in amdgpu_ring_init() drm/amdkfd: fix use-after-free and multi-container gap in kfd_dev_mapping drm/amdgpu/vcn4.0.3: fix video_timeout unit mismatch in jpeg reset wait drm/amdgpu/vcn5.0.1: fix video_timeout unit mismatch in jpeg reset wait drm/amdgpu/userq: fix double jiffies conversion in hang detect timeout drm/amdgpu: move userq fence wait out of signalling section drm/amd/display: Fix dc stream excess put in dm_update_crtc_state() drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms drm/xe: harden adjust_idledly() against divide-by-zero and overflow drm/xe: Limit sg segment size to PAGE_SIZE on Xen PV drm/i915: fix incorrect RCU teardown order ...
2026-09-26Merge tag 'amd-drm-next-7.4-2026-09-24' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/amdgpu/kernel into drm-next amd-drm-next-7.4-2026-09-24: amdgpu: - Display ref count fix - Userq fixes - VCN 4, 5 reset fixes - Fixes for various error paths - Stack frame size fixes for various combinations of compilers and configs - GC 12.1 fixes - RAS updates - SR-IOV udpates - MES fixes - UALink updates - ABM updates - DCN 6 updates - Rework display instance handling - KUnit test updates - Documentation fixes - DCN 4.2 updates - Freesync updates - Cursor refactor - amdgpu_vm_eviction_(try)lock cleanup amdkfd: - Possible UAF fix - GC 12.1 trap fixes Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://patch.msgid.link/20260924174339.635232-1-alexander.deucher@amd.com
2026-09-26Merge tag 'drm-misc-fixes-2026-09-24' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/misc/kernel into drm-fixes A number of fixes: - bridge: - samsung-dsim: fix GPIO lifetime - client: Null pointer dereference fix - imagination: error handling fix, page handling fix - nouveau: fix reference leaks, double-frees, out-of-bounds accesses, use-after-frees, don't reject config without SCDC, a number of workarounds - virtio: fix memory leak, reference leaks, null pointer dereference, add pixel blend mode, cache coherency fix Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maxime Ripard <self@mripard.dev> Link: https://patch.msgid.link/arU22zzqUGDEco1y@houat
2026-09-25Merge tag 'scsi-fixes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi Pull SCSI fixes from James Bottomley: "Mostly small driver fixes. The biggest fix is the one to the block zone handling which might trip for real or virtual hardware if the number of zones is > 2^32" * tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: scsi: megaraid_sas: Protect megasas_get_ctrl_info() in megasas_resume() scsi: sd_zbc: Reject disks with too many zones scsi: block: Fix zones_cond out-of-bounds write on zone report scsi: leapraid: Avoid -Wformat-security warning scsi: devinfo: Add BLIST_SKIP_IO_HINTS for EMC Symmetrix scsi: libiscsi_tcp: Check the data direction of a Data-In PDU scsi: ufs: pltfrm: Add quirk for R-Car S4 lacking lanes-per-direction scsi: ufs: core: Keep internal commands dispatchable during error handling
2026-09-25firewire: core: add __counted_by_ptr attribute to struct fw_deviceBill Wendling
The GCC and Clang attribute '__counted_by_ptr' associates a pointer field with an integer field holding its element count. This enables runtime bounds checking by KASAN and UBSAN to prevent out-of-bounds accesses to the pointer. In 'struct fw_device' (defined in 'include/linux/firewire.h'), the field 'config_rom' is a pointer to the device's Configuration ROM data, and its associated element count is stored in 'config_rom_length'. Additionally, update the existing KUnit test in 'drivers/firewire/device-attribute-test.c' where 'config_rom_length' was incorrectly initialized with the byte size ('sizeof(simple_avc_config_rom)') instead of the element count ('ARRAY_SIZE(simple_avc_config_rom)'). This ensures the '__counted_by_ptr' bounds-checking annotation does not trigger any false-positive panics or compile/runtime checks. Cc: codemender-patching+linux@google.com Assisted-by: LLM Signed-off-by: Bill Wendling <morbo@google.com> Link: https://lore.kernel.org/r/20260925212552.125652-1-morbo@google.com Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2026-09-25PCI: rcar-gen4: Add Application/Local register reset controlMarek Vasut
The R-Car Gen4 PCIe controller does contain core reset, which puts the controller back into well-defined state, but it does also tear down the PCIe link. This is called Application/Local register reset in the documentation. Deassert the core reset after the core clock has been enabled, and assert the core reset in case of error or when shutting down the controller. This also fixes reinitialization failure of the controller, where if the controller driver is unbound and bound again via sysfs attributes, the controller driver will fail to probe the second time because it fails to access the controller DBI, which returns all zeroes unless the core reset is toggled. The following commands trigger this fault on R-Car V4H: $ echo e65d0000.pcie > /sys/bus/platform/drivers/pcie-rcar-gen4/unbind $ echo e65d0000.pcie > /sys/bus/platform/drivers/pcie-rcar-gen4/bind Fixes: faf5a975ee3b ("PCI: rcar-gen4: Add support for R-Car V4H") Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> [mani: added fixes tag and cced noautosel] Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: <stable+noautosel@kernel.org> # DTS dependency Link: https://patch.msgid.link/20260903205153.283553-3-marek.vasut+renesas@mailbox.org
2026-09-25peci: npcm: Initialize state before requesting IRQRunyu Xiao
The PECI interrupt handler uses the lock and completion object as soon as the interrupt is delivered. Initialize both before registering the handler so an early interrupt cannot access uninitialized state. Fixes: 3e16184a1bd8 ("peci: Add peci-npcm controller driver") Cc: stable@vger.kernel.org Assisted-by: Codex:GPT-5 Signed-off-by: Runyu Xiao <runyu.xiao@seu.edu.cn> Reviewed-by: Iwona Winiarska <iwona.winiarska@intel.com> Link: https://lore.kernel.org/r/20260902152256.3591658-1-runyu.xiao@seu.edu.cn Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>
2026-09-25peci: aspeed: Initialize state before requesting IRQRunyu Xiao
The PECI interrupt handler uses the lock and completion object as soon as the interrupt is delivered. Initialize both before registering the handler so an early interrupt cannot access uninitialized state. Fixes: a85e4c52086c ("peci: Add peci-aspeed controller driver") Cc: stable@vger.kernel.org Assisted-by: Codex:GPT-5 Signed-off-by: Runyu Xiao <runyu.xiao@seu.edu.cn> Reviewed-by: Iwona Winiarska <iwona.winiarska@intel.com> Link: https://lore.kernel.org/r/20260902142600.3580382-1-runyu.xiao@seu.edu.cn Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>
2026-09-25peci: controller: aspeed: Make sure clk_init_data is fully initializedGeert Uytterhoeven
The clk_init_data structure contains several mutually-exclusive members for different methods to specify the possible parents of a clock, prompting drivers to initialize only the members they need. However, not initializing all members may cause subtle issues, which are only exposed when CONFIG_INIT_STACK_ALL_PATTERN or CONFIG_INIT_STACK_NONE is enabled. Make sure all members are fully initialized, to avoid such bugs, and to prevent future breakage when converting drivers to a different method for specifying the parents. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Iwona Winiarska <iwona.winiarska@intel.com> Reviewed-by: Brian Masney <bmasney@redhat.com> Link: https://lore.kernel.org/r/48aa77c45e109f78ccd806bc3b7bf380c5bc5e71.1787240145.git.geert+renesas@glider.be Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>