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2026-10-09ALSA: caiaq: Register card at the final stepTakashi Iwai
caiaq driver calls snd_card_register() before creating the mixer elements, which is rather confusing to user-space, as the devices have been published before adding the control elements. Swap the call order to make the card registration as the final step (as written in the comment). Fixes: 8e3cd08ed8e5 ("[ALSA] caiaq - add control API and more input features") Reported-by: Sashiko <sashiko-bot@kernel.org> Link: https://patch.msgid.link/20261008192553.300025-6-tiwai@suse.de Signed-off-by: Takashi Iwai <tiwai@suse.de>
2026-10-09gpu: buddy: Drop the stale @p line from the gpu_buddy_print() kernel-docKarl Mehltretter
gpu_buddy_print() takes only the allocator since commit ba110db8e1bc ("gpu: Move DRM buddy allocator one level up (part two)"), but the kernel-doc still describes a printer argument and kernel-doc warns about the excess parameter on every docs build. Drop the line. Fixes: ba110db8e1bc ("gpu: Move DRM buddy allocator one level up (part two)") Assisted-by: LLM Signed-off-by: Karl Mehltretter <kmehltretter@gmail.com> Reviewed-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com> Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com> Link: https://patch.msgid.link/20260907012125.21209-1-kmehltretter@gmail.com
2026-10-09livepatch: remove myself from MAINTAINERSJiri Kosina
As discussed at LPC 2026 with Josh -- I am not an active kernel livepatching maintainer any more, so let's properly reflect that. Signed-off-by: Jiri Kosina <jkosina@suse.com> Link: https://patch.msgid.link/6pq4rr41-0p23-2oq5-o750-0259410q9680@xreary.bet Signed-off-by: Petr Mladek <pmladek@suse.com>
2026-10-09ata: sata_mv: enable SoC SATA LED presence indicationCarlos Junior
Enable the SoC SATA LED controller in mv_soc_enable_leds(). Set the LED controller enable and device presence multiplexing bits in the SoC SATA host-controller register. This enables SATA device presence indication on boards using the SoC SATA controller. Signed-off-by: Carlos Junior <cjuniorfox@gmail.com> Reviewed-by: Damien Le Moal <dlemoal@kernel.org> Link: https://lore.kernel.org/r/20260928133040.222155-1-cjuniorfox@gmail.com Signed-off-by: Niklas Cassel <cassel@kernel.org>
2026-10-09drm/ttm: return an error when kmapping a BO without pagesJesse Zhang
ttm_tt objects for imported sg tables (ttm_bo_type_sg, set up by ttm_sg_tt_init() with TTM_TT_FLAG_EXTERNAL) only have DMA addresses and no pages array. ttm_bo_kmap() and ttm_bo_vmap() still dereference ttm->pages for them, so a driver that tries to CPU map such a BO oopses instead of getting an error: BUG: kernel NULL pointer dereference, address: 0000000000000000 RIP: 0010:ttm_bo_kmap+0x26c/0x300 [ttm] Call Trace: amdgpu_bo_kmap+0x89/0xb0 [amdgpu] amdgpu_userq_fence_read_wptr+0x116/0x170 [amdgpu] amdgpu_userq_signal_ioctl+0x3fe/0xbb0 [amdgpu] Return -EINVAL in that case, like ttm_bo_kmap_try_from_panic() already checks for a missing pages array. Fixes: 75a57669cbc8 ("drm/ttm: add ttm_sg_tt_init") Cc: stable@vger.kernel.org Suggested-by: Christian König <christian.koenig@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com> Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com> Link: https://patch.msgid.link/20261009103419.4122940-1-Jesse.Zhang@amd.com
2026-10-09media: i2c: imx576: Fix line length registerDavid Carlier
The line length is written to FRAME_LENGTH_LINES instead of LINE_LENGTH_PCK. The value is later overwritten by the VBLANK control, so the sensor runs with its default line length while the driver reports HBLANK and PIXEL_RATE computed from IMX576_LINE_LENGTH. Fixes: ee2e9bf41d3e ("media: i2c: add imx576 image sensor driver") Signed-off-by: David Carlier <devnexen@gmail.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-10-09media: ov05c10: Remove duplicated writes to analogue gain registerSakari Ailus
Remove duplicated writes to analogue gain (P1:0x24) register from the mode register list. Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Reviewed-by: Tarang Raval <tarang.raval@siliconsignals.io> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-10-09media: ov05c10: Power management fixesSakari Ailus
If the device wasn't powered on in probe(), probe failure led to it still being powered off. Also the device's PM runtime status was left active when sub-device registration failed and autosuspend was left enabled after unbind. Fix all three issues. Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Reviewed-by: Tarang Raval <tarang.raval@siliconsignals.io> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-10-09media: ov05c10: Set reset GPIO high when acquiring itSakari Ailus
Set the reset GPIO high when it is acquired. Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Reviewed-by: Tarang Raval <tarang.raval@siliconsignals.io> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-10-09media: ov05c10: Small cleanupsSakari Ailus
- Use dev_err_probe() instead of dev_err() in probe() path - Don't set event handlers just for controls - Don't set HAS_DEVNODE sub-device flag - Coding style improvements - Use container_of_const() Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Reviewed-by: Tarang Raval <tarang.raval@siliconsignals.io> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-10-09media: maxim-serdes: Disable test pattern generator for nowSakari Ailus
Disable the test pattern generator that uses the INTERNAL pad flags for now. Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-10-09media: mc: Keep INTERNAL pad flags just for the kernel, for nowSakari Ailus
Do not expose INTERNAL pads on UAPI as neither the documentation nor v4l2-compliance changes to support MEDIA_PAD_FL_INTERNAL pads have been merged yet. Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Hans Verkuil <hverkuil+cisco@kernel.org> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-10-09coresight: tnoc: Constify amba_id tableKrzysztof Kozlowski
Static 'struct amba_id' table is not modified so can be changed to const for more safety. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Leo Yan <leo.yan@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20260705171934.116425-2-krzysztof.kozlowski@oss.qualcomm.com
2026-10-09RISC-V: KVM: Reject vCPU creation after AIA initializationAndrew Jones
AIA initialization sets up per-vCPU IMSIC state by iterating over all online vCPUs. Creating another vCPU afterwards leaves it without initialized IMSIC state, but KVM currently permits that sequence. Reject KVM_CREATE_VCPU once AIA initialization succeeds. Both paths are serialized by kvm->lock, so checking the initialized state from kvm_arch_vcpu_precreate() freezes the vCPU set used by AIA. Fixes: 89d01306e34d ("RISC-V: KVM: Implement device interface for AIA irqchip") Signed-off-by: Andrew Jones <andrew.jones@oss.qualcomm.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20260925160300.467884-1-andrew.jones@oss.qualcomm.com Signed-off-by: Anup Patel <anup@brainfault.org>
2026-10-09dm-mpath: check values in hst_status while holding spinlockBenjamin Marzinski
To keep the values of pi->historical_service_time, pi->outstanding, and pi->stale_after consistent, get them while holding a spin_lock in hst_status(), like all other accesses do. Signed-off-by: Benjamin Marzinski <bmarzins@redhat.com> Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
2026-10-09dmaengine: move driver-private helpers out of include/linux/dmaengine.hFrank Li
Move the following functions and declarations from the public header include/linux/dmaengine.h into the driver-private header drivers/dma/dmaengine.h, since they are only used by DMA engine drivers and not by DMA engine consumers: - dma_async_device_register() - dmaenginem_async_device_register() - dma_async_device_unregister() - dma_async_device_channel_register() - dma_async_device_channel_unregister() - is_slave_direction() - dmaengine_get_direction_text() Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20261001143955.2195063-1-Frank.Li@oss.nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-10-09dm-mpath: standardize repeat_count handling in the HST path selectorBenjamin Marzinski
The Historical Service Time path selector ignores the repeat_count argument just like all the other path selectors. But all of the other path_selectors explicitly print a warning message when the repeat_count is set greater than 1. Also, all of the other selectors print 1 for the repeat_count when printing the table. Standardize the HST path selector to match. Signed-off-by: Benjamin Marzinski <bmarzins@redhat.com> Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
2026-10-09dmaengine: add dmaengine_desc_set_callback() helperFrank Li
Add a dmaengine_desc_set_callback() inline helper that sets the callback, callback_result, and callback_param fields of a dma_async_tx_descriptor together in a single call. Using this helper instead of open-coding the three field assignments ensures all three related fields are always updated consistently and makes call sites more readable. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20261002195410.213610-1-Frank.Li@oss.nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-10-09dm-mpath: streamline setup work in the HST path selectorBenjamin Marzinski
fixed_power() is convoluted and does unnecessary work here, since hst_set_weights() calculates x^n for n = [1,64]. x^1 is x, and x^(n) is just x * x^(n-1), so all these values can be trivially computed from the previous value. Signed-off-by: Benjamin Marzinski <bmarzins@redhat.com> Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
2026-10-09dmaengine: add dmaengine_get_provider_device() APIFrank Li
Add dmaengine_get_provider_device() API and kernel doc for dmaengine_get_dma_device() to describe the difference. dmaengine_get_dma_device() is used for DMA mapping because some DMA engines provide per-channel iommu mapping. dmaengine_get_provider_device() is used to find a DMA engine channel by a filter function. In most cases they return the same value, but they have different semantic meanings. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20261002202341.253152-1-Frank.Li@oss.nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-10-09KVM: riscv: selftests: Dump sepc/scause/stval on vcpu_arch_dump()Yong-Xuan Wang
vcpu_arch_dump() omits trap-related CSRs, making it hard to diagnose unexpected guest exceptions from the dump output alone. Print sepc, scause, and stval alongside the existing register dump. Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20260831-kvm_kselftest_dump-v1-1-55b022c6ef8e@sifive.com Signed-off-by: Anup Patel <anup@brainfault.org>
2026-10-09dmaengine: add dmaengine_get_max_xor() helperFrank Li
Add a new inline helper dmaengine_get_max_xor() that returns the maximum number of XOR source buffers supported by the DMA channel's device. Returns 0 if the channel is NULL or does not support XOR operations. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20261005-dmaengine_prep_dma_pq-v3-5-a4a241f26fa7@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-10-09dmaengine: add dmaengine_get_cap_mask() and dmaengine_has_cap() helpersFrank Li
Add two new inline helpers to query DMA channel capabilities without directly accessing the internal dma_device pointer: dmaengine_get_cap_mask(chan) - returns a const pointer to the capability mask of the DMA device backing the channel. dmaengine_has_cap(chan, tx_type) - returns true if the channel supports the given transaction type. These complement the existing dma_has_cap() macro which operates on a dma_cap_mask_t directly. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20261005-dmaengine_prep_dma_pq-v3-4-a4a241f26fa7@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-10-09dmaengine: add dmaengine_get_copy_align() and related alignment getter helpersFrank Li
Add dmaengine_get_copy_align(), dmaengine_get_xor_align(), dmaengine_get_pq_align(), and dmaengine_get_fill_align() inline helpers to retrieve the alignment requirement of a DMA channel as a power-of-2 exponent. These complement the existing dmaengine_is_*_aligned() test helpers by providing direct access to the alignment value, which is useful when callers need to propagate or compare alignment constraints. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20261005-dmaengine_prep_dma_pq-v3-3-a4a241f26fa7@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-10-09dmaengine: add dmaengine_is_*_aligned() helpers for DMA consumersFrank Li
DMA engine consumers typically hold a struct dma_chan pointer and should not need to reach into struct dma_device directly to check alignment requirements. Add dmaengine_is_copy_aligned(), dmaengine_is_xor_aligned(), dmaengine_is_pq_aligned() and dmaengine_is_fill_aligned() as channel-based counterparts to the existing is_dma_*_aligned() family. Each wrapper calls dmaengine_check_align() directly with the alignment value from chan->device, keeping struct dma_device opaque to consumers. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20261005-dmaengine_prep_dma_pq-v3-2-a4a241f26fa7@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-10-09dmaengine: add dmaengine_prep_dma_(pq|pq_val|interrupt|xor)() APIFrank Li
Add dmaengine_prep_dma_(pq|pq_val|interrupt|xor)() as an inline wrapper around the device_prep_dma_(pq|pq_val|interrupt|xor)() callback, consistent with how other dmaengine prep helpers like dmaengine_prep_dma_memcpy() are structured. Provide a clean public API that hides the direct callback access and add proper NULL-checks on chan, chan->device, and the callback pointer. Assisted-by: LLM Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20261005-dmaengine_prep_dma_pq-v3-1-a4a241f26fa7@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-10-09Merge tag 'drm-intel-next-2026-10-02' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/i915/kernel into drm-next [airlied: add xe fixup] - Vswing / Pre-emphasis Override (Michal) - Enable AS SDP Skip Frames (Uma) - Handle negative configuration index on DP link caps for robustness (Luca) - Perform full wedge on display reset (Ville) - PSR related revert and fix (Nemesa) - Preparation for enabling SDR plane color pipeline (Chaitanya, Pranay) - An eDP quirk for HP Pavilion Plus (Ankit) - DP MST fixes (Imre) - General display fixes and small improvements (Jani, Lalit, Vinod, Sebastian) - Introduce PME (Power Management Event) support on display hotplug (Vinod) - Force eDP sink awake on dpcd init (Arun) - Stop using the configurable fence timeout and other cleanups (Jani) - Add support for Common SDP Transmission Line (Ankit, Arun) - Map AUX power domains to DC_off (Suraj) - Handle VSC SDP revision 7 in unpack (Juasheem) - Disable VRR DC balance by default (Mitul) - Switch to modern drm_dp_dpcd* accessors (Jani) - Lg DPCD access errors (Suraj) - Fixes to make i915 work well with PREEMPT_RT (Maarten, Sebastian) - Update the CMN_SDP_TL in fastset path (Ankit) - Use a shared gtt_view_types.h header (Jani) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patch.msgid.link/asAD6RRGxlbIPdhz@intel.com
2026-10-09i2c: qcom-cci: always enable SCL clock stretchingHitesh Patel
The CCI timing tables leave SCL clock stretching disabled. A slave that holds SCL low is then not waited for: the master keeps its own clock timing and the transfer fails with a NACK or returns corrupt data. This is hit with a camera reached through a GMSL serializer/deserializer I2C tunnel (MAX9296A/MAX96717 on the RB3 Gen2 vision mezzanine). The deserializer acknowledges the address locally, but forwards the transaction over the coax link and stretches SCL until the remote side has completed it, which takes well over one clock period at 100 kHz. Without stretching the register reads of the sensor behind the link intermittently return garbage and writes are dropped, which shows up as random sensor init failures. Clock stretching is part of the I2C specification for every speed mode and a device that does not stretch is unaffected by enabling it, so set the bit unconditionally in cci_init() and drop the per-table scl_stretch_en field, which is zero in every table. Signed-off-by: Hitesh Patel <hitesh@ebytelogic.com> Reviewed-by: Loic Poulain <loic.poulain@oss.qualcomm.com> Tested-by: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com> # S5KJN5 on Kaanapali Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://patch.msgid.link/20261007050147.274096-1-hitesh@ebytelogic.com
2026-10-09iommu/dma: Clean up redundant MSI cookie checkRobin Murphy
The has_msi_cookie() condition only mattered transiently as an artefact of the cookie rework being done in parallel with the sw_msi rework. Once combined, calls to iommu_dma_sw_msi() are themselves dispatched based on domain->cookie_type, so checking again is clearly redundant. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Reviewed-by: Nicolin Chen <nicolinc@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2026-10-09iommu/dma: Catch scatterlist length overflowsKrzysztof Karas
It is possible, when a very large mapping uses only one scatterlist, that padding overflows scatterlist's length field. This results in: 1) silently wrapping the value 2) smaller than desired mappings produced by iommu_map_sg 3) leaving mapped bytes in memory (no iommu_unmap) Address this issue by adding overflow detection for scatterlist length field. Fixes: 809eac54cdd6 ("iommu/dma: Implement scatterlist segment merging") Cc: stable@vger.kernel.org Assisted-by: LLM Signed-off-by: Krzysztof Karas <krzysztof.karas@intel.com> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Reviewed-by: Sebastian Brzezinka <sebastian.brzezinka@intel.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2026-10-09iommu/hyperv: Add page-selective IOTLB flush supportYu Zhang
Add page-selective IOTLB flush using HVCALL_FLUSH_DEVICE_DOMAIN_LIST. This hypercall accepts a list of (page_number, page_mask_shift) entries, enabling finer-grained IOTLB invalidation compared to the domain-wide HVCALL_FLUSH_DEVICE_DOMAIN used by hv_iommu_flush_iotlb_all(). hv_iommu_calc_flush_range() computes the smallest power-of-two aligned range that covers the target IOVA region, producing a single flush descriptor. This may over-flush when the range is not naturally aligned, matching the approach used by Intel VT-d PSI. If the page-selective flush fails, the code falls back to a full domain flush. Signed-off-by: Easwar Hariharan <easwar.hariharan@linux.microsoft.com> Signed-off-by: Yu Zhang <zhangyu1@linux.microsoft.com> Reviewed-by: Jacob Pan <jacob.pan@linux.microsoft.com> Reviewed-by: Michael Kelley <mhklinux@outlook.com> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2026-10-09iommu/hyperv: Add para-virtualized IOMMU support for Hyper-V guestYu Zhang
Add a para-virtualized IOMMU driver for Linux guests running on Hyper-V. This driver implements stage-1 IO translation within the guest OS. It integrates with the Linux IOMMU core, utilizing Hyper-V hypercalls for: - Capability discovery - Domain allocation, configuration, and deallocation - Device attachment and detachment - IOTLB invalidation The driver constructs x86-compatible stage-1 IO page tables in the guest memory using consolidated IO page table helpers. This allows the guest to manage stage-1 translations independently of vendor- specific drivers (like Intel VT-d or AMD IOMMU). Hyper-V consumes this stage-1 IO page table when a device domain is created and configured, and nests it with the host's stage-2 IO page tables, therefore eliminating the VM exits for guest IOMMU mapping operations. For unmapping operations, VM exits to perform the IOTLB flush are still unavoidable. Guest hibernation and resume are not supported by this initial implementation. The guest-owned stage-1 page tables reside in guest memory and are preserved in the hibernation image. However, the image does not by itself preserve the Hyper-V device-domain objects or their device attachments, and the current pvIOMMU interface does not define whether or how Hyper-V restores that state. To identify a device in its hypercall interface, the driver looks up the logical device ID prefix registered for the device's PCI domain (see the logical device ID registry in hv_common.c) and combines it with the PCI function number of the endpoint device. Co-developed-by: Wei Liu <wei.liu@kernel.org> Signed-off-by: Wei Liu <wei.liu@kernel.org> Co-developed-by: Easwar Hariharan <easwar.hariharan@linux.microsoft.com> Signed-off-by: Easwar Hariharan <easwar.hariharan@linux.microsoft.com> Signed-off-by: Yu Zhang <zhangyu1@linux.microsoft.com> Reviewed-by: Jacob Pan <jacob.pan@linux.microsoft.com> Reviewed-by: Michael Kelley <mhklinux@outlook.com> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2026-10-09iommu/x86: Add architectural MSI reserved region helperYu Zhang
Intel and AMD IOMMU drivers both reserve the x86 architectural MSI address window from normal IOVA mappings, but each open-codes the range, allocation attributes, and insertion into the reserved-region list. Add iommu_add_resv_x86_msi_region() to encapsulate those operations, and convert the Intel and AMD drivers to use it. Return an error on allocation failure so callers can preserve their existing error paths. Signed-off-by: Yu Zhang <zhangyu1@linux.microsoft.com> Reviewed-by: Michael Kelley <mhklinux@outlook.com> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Reviewed-by: Vasant Hegde <vasant.hegde@amd.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2026-10-09Drivers: hv: Add logical device ID registry for vPCI devicesYu Zhang
Hyper-V identifies each PCI pass-thru device by a logical device ID in its hypercall interface. This ID consists of a per-bus prefix, derived from the VMBus device instance GUID, combined with the PCI function number of the endpoint device. Add a registry in hv_common.c that maps a PCI domain number to its logical device ID prefix. The vPCI bus driver (pci-hyperv) registers the prefix when a bus is probed and unregisters it when the bus is removed. Consumers such as the para-virtualized IOMMU driver look up the prefix by PCI domain number and combine it with the function number to form the complete logical device ID for hypercalls. Use rhashtable for the sparse exact-match mapping. Lookups copy the prefix while holding the RCU read lock, and removal defers freeing the entry until existing readers have completed. The prefix construction is shared via hv_build_logical_dev_id_prefix() so that pci-hyperv's interrupt retargeting path and the registry use exactly the same byte layout. It is derived on demand from the constant hv_device instance GUID rather than cached in struct hv_pcibus_device, which is private to the pci-hyperv module; this keeps the interface narrow and avoids depending on pci-hyperv internals. Co-developed-by: Easwar Hariharan <easwar.hariharan@linux.microsoft.com> Signed-off-by: Easwar Hariharan <easwar.hariharan@linux.microsoft.com> Signed-off-by: Yu Zhang <zhangyu1@linux.microsoft.com> Reviewed-by: Michael Kelley <mhklinux@outlook.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2026-10-09hyperv: Introduce new hypercall interfaces used by Hyper-V guest IOMMUWei Liu
Hyper-V guest IOMMU is a para-virtualized IOMMU based on hypercalls. Introduce the hypercalls used by the child partition to interact with this facility. These hypercalls fall into below categories: - Detection and capability: HVCALL_GET_IOMMU_CAPABILITIES is used to detect the existence and capabilities of the guest IOMMU. - Device management: HVCALL_GET_LOGICAL_DEVICE_PROPERTY is used to check whether an endpoint device is managed by the guest IOMMU. - Domain management: A set of hypercalls is provided to handle the creation, configuration, and deletion of guest domains, as well as the attachment/detachment of endpoint devices to/from those domains. - IOTLB flushing: HVCALL_FLUSH_DEVICE_DOMAIN is used to ask Hyper-V for a domain-selective IOTLB flush (which in its handler may flush the device TLB as well). Signed-off-by: Wei Liu <wei.liu@kernel.org> Co-developed-by: Easwar Hariharan <easwar.hariharan@linux.microsoft.com> Signed-off-by: Easwar Hariharan <easwar.hariharan@linux.microsoft.com> Co-developed-by: Yu Zhang <zhangyu1@linux.microsoft.com> Signed-off-by: Yu Zhang <zhangyu1@linux.microsoft.com> Reviewed-by: Jacob Pan <jacob.pan@linux.microsoft.com> Reviewed-by: Michael Kelley <mhklinux@outlook.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2026-10-09xen-pciback: Fix pcistub_device ref leak in pcistub_get_gsi_from_sbdf()Wentao Liang
pcistub_get_gsi_from_sbdf() obtains the stub device with pcistub_device_find(), which returns it with its kref incremented, and returns psdev->gsi without dropping that reference again. The caller cannot release it either, so every lookup leaks one reference to the stub device. Release the reference after reading gsi. Fixes: 2fae6bb7be32 ("xen/privcmd: Add new syscall to get gsi from dev") Cc: stable@vger.kernel.org Signed-off-by: Wentao Liang <vulab@iscas.ac.cn> Reviewed-by: Juergen Gross <jgross@suse.com> Reviewed-by: Jiqian Chen <Jiqian.Chen@amd.com> Signed-off-by: Juergen Gross <jgross@suse.com> Message-ID: <20260916171141.2086627-1-vulab@iscas.ac.cn>
2026-10-09xen/pcifront: check that an AER callback exists before calling itYehyeong Lee
pcifront_common_process() handles an AER request from the backend by dispatching on aer_op.cmd to the bound driver's PCI error handler. It only checks that err_handler and err_handler->error_detected are present, then for the mmio_enabled, slot_reset and resume commands it calls the corresponding callback unconditionally. Those three callbacks are optional -- the PCI core NULL-checks each of them individually before use -- and many drivers (for example igb, igc, ice and ixgbevf) install error_detected without all of them. aer_op.cmd comes from the shared ring, so a malicious or buggy backend can send XEN_PCI_OP_aer_mmio (or _slotreset/_resume) for a device whose driver leaves that callback NULL and make the frontend call through a NULL pointer, crashing the guest. Check each callback before calling it. When mmio_enabled or slot_reset is absent, return PCI_ERS_RESULT_RECOVERED so recovery proceeds, as the PCI core does for a missing callback; returning PCI_ERS_RESULT_NONE would instead make xen-pciback tear the guest domain down. Fixes: 956a9202cd12 ("xen-pcifront: Xen PCI frontend driver.") Cc: stable@vger.kernel.org Signed-off-by: Yehyeong Lee <yhlee@isslab.korea.ac.kr> Reviewed-by: Juergen Gross <jgross@suse.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Juergen Gross <jgross@suse.com> Message-ID: <20261006023443.338194-1-yhlee@isslab.korea.ac.kr>
2026-10-09xen/gntdev: Fix gntdev_dmabuf ref leak in dmabuf_exp_wait_released()Wentao Liang
dmabuf_exp_wait_released() takes a reference on the exported gntdev_dmabuf with dmabuf_exp_wait_obj_get_dmabuf() and passes it to dmabuf_exp_wait_obj_new(), which drops that reference after adding the wait object to the wait list. When the wait object allocation fails, dmabuf_exp_wait_obj_new() returns ERR_PTR(-ENOMEM) early and the reference is never dropped, leaking a reference to the exported gntdev_dmabuf. Drop the reference on the allocation failure path so the reference is consumed whether the wait object is created or not. Fixes: 932d6562179e ("xen/gntdev: Add initial support for dma-buf UAPI") Cc: stable@vger.kernel.org Signed-off-by: Wentao Liang <vulab@iscas.ac.cn> Reviewed-by: Juergen Gross <jgross@suse.com> Signed-off-by: Juergen Gross <jgross@suse.com> Message-ID: <20260916170956.2086505-1-vulab@iscas.ac.cn>
2026-10-09x86/PVH: don't truncate initrd address/sizeJan Beulich
Consuming merely the lower halves of the provided values isn't very useful. (While generally loaders try to place it below 4G, especially when it's huge it may not fit there.) Fixes: 7243b93345f7 ("xen/pvh: Bootstrap PVH guest") Signed-off-by: Jan Beulich <jbeulich@suse.com> Reviewed-by: Jason Andryuk <jason.andryuk@amd.com> Reviewed-by: Juergen Gross <jgross@suse.com> Signed-off-by: Juergen Gross <jgross@suse.com> Message-ID: <9698d810-6664-4a9d-a847-18ad124261e0@suse.com>
2026-10-09xen/privcmd: Only claim ioreqs matching an ioeventfdKoichiro Den
The ioeventfd handler shares its event channel with the userspace device model. It must only claim requests that match a registered ioeventfd. Other requests are left for userspace. ioeventfd_interrupt() currently marks every MMIO write INPROCESS before looking for a match. For an unmatched request it drops the lock and restores READY. Userspace may see INPROCESS and skip it. Restoring READY does not send another notification. If userspace handles the request at the same time, the READY store may overwrite its state. Find a matching ioeventfd before changing the request state. The lock now protects only the ioeventfd list. Use explicit virt_*mb() barriers for the ioreq shared with Xen. Fixes: f0d7db7b3324 ("xen: privcmd: Add support for ioeventfd") Cc: stable@vger.kernel.org Signed-off-by: Koichiro Den <den@valinux.co.jp> Reviewed-by: Juergen Gross <jgross@suse.com> Signed-off-by: Juergen Gross <jgross@suse.com> Message-ID: <20260821084112.2374949-1-den@valinux.co.jp>
2026-10-09drm/bridge: simple: add Chrontel CH7218AXilin Wu
The Chrontel CH7218A automatically boots its embedded firmware and operates without host-side configuration. Add the CH7218A to the simple bridge driver and expose its output as an HDMI Type-A connector. Tested-by: Daniele Briguglio <hello@superkali.me> Signed-off-by: Xilin Wu <sophon@radxa.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://patch.msgid.link/20261009-q8b-dts-v2-2-eda11e5dea8b@radxa.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-09dt-bindings: display: bridge: simple: document Chrontel CH7218AXilin Wu
The Chrontel CH7218A is a DisplayPort 1.4 to HDMI 2.1 protocol converter. The device contains an embedded microcontroller and on-chip flash. It automatically boots its firmware and requires no host-side configuration for the on-board use case, so it can be represented by the simple bridge binding. Document the chrontel,ch7218a compatible. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Tested-by: Daniele Briguglio <hello@superkali.me> Signed-off-by: Xilin Wu <sophon@radxa.com> Link: https://patch.msgid.link/20261009-q8b-dts-v2-1-eda11e5dea8b@radxa.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-09KVM: arm64: Prevent unsupported vcpu features for VM typesSuzuki K Poulose
Prevent unsupported VCPU features for the protected VCPUs. Realms and pVMs not support 32bit EL1 or NV yet. pKVM doesn't rely on the host vcpu features for protected VMs and hand picks features while hyp_vcpu is initialised. Block the features early in the vcpu init if we detect incompatible features. Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://patch.msgid.link/20261007073537.2454351-15-suzuki.poulose@arm.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2026-10-09KVM: arm64: Mandate VGIC v3 for pKVM VMs and RealmsSuzuki K Poulose
pKVM does not trust the host. Realm VMs follow a similar trust model, with the Realm Management Monitor owning the protected state instead of the host. Add a helper to identify VMs that run under a host-distrusting hypervisor. Use this for blocking ioremap of vgic-v2 into stage2 and prevent creation of VGIC other than v3. Reviewed-by: Jonathan Cameron <jonathan.cameron@oss.qualcomm.com> Reviewed-by: Fuad Tabba <fuad.tabba@linux.dev> Reviewed-by: Gavin Shan <gshan@redhat.com> Tested-by: Gavin Shan <gshan@redhat.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://patch.msgid.link/20261007073537.2454351-14-suzuki.poulose@arm.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2026-10-09KVM: arm64: Abstract out memory abort handlingSuzuki K Poulose
Move the memory abort handling under VM specific s2 operation. Tested-by: Gavin Shan <gshan@redhat.com> Reviewed-by: Gavin Shan <gshan@redhat.com> Reviewed-by: Fuad Tabba <fuad.tabba@linux.dev> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://patch.msgid.link/20261007073537.2454351-13-suzuki.poulose@arm.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2026-10-09media: i2c: imx576: select VIDEO_CCS_PLL to repair build errorRandy Dunlap
or1k-linux-ld: drivers/media/i2c/imx576.o: in function `imx576_probe': drivers/media/i2c/imx576.c:612:(.text+0xf68): undefined reference to `ccs_pll_calculate' Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-10-09media: Documentation: mc: Fix Stream referenceSakari Ailus
Fix referencing Stream in glossary. Fixes: 49cdf56876d3 ("media: mc: Add INTERNAL pad flag") Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-10-09soc: fsl: dpio: Free the IRQ before releasing the I/O objectMyeonghun Pak
The DPIO interrupt handler accesses priv->io, but dpaa2_dpio_remove() releases that object before tearing down the interrupts. The IRQ was requested with devm_request_irq(), and unregister_dpio_irq_handlers() only clears its affinity hint. fsl_mc_free_irqs() returns IRQ resources to the MC resource pool without freeing the handler. An interrupt can therefore access the freed I/O object before devres releases the IRQ. Explicitly free the managed IRQ in unregister_dpio_irq_handlers() before returning its resource to the pool, and perform IRQ teardown before releasing the I/O object. This also waits for an in-flight handler while the object is still valid. This issue was identified during our ongoing static-analysis research while reviewing kernel code. Fixes: 993fec7e11ca ("bus: fsl-mc: dpio: add the DPAA2 DPIO object driver") Cc: stable@vger.kernel.org Assisted-by: LLM Co-developed-by: Ijae Kim <ae878000@gmail.com> Signed-off-by: Ijae Kim <ae878000@gmail.com> Signed-off-by: Myeonghun Pak <mhun512@gmail.com> Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> Link: https://lore.kernel.org/r/20261002194802.375497-3-mhun512@gmail.com Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
2026-10-09soc: fsl: dpio: Fix cleanup on IRQ registration failureMyeonghun Pak
IRQ registration happens after dpaa2_io_create(), but its failure path only releases the IRQ resources and the MC portal. The I/O object stays allocated and published in the service list and per-CPU lookup table, while devres unmaps its portal registers after probe fails. Call dpaa2_io_down() on IRQ registration failure to remove the object from those lookup structures and free it. Reorder the error labels so that a failed dpaa2_io_create() still skips this cleanup. Remove unregister_dpio_irq_handlers() from the probe error path, since no IRQ handler or affinity hint has been installed when registration fails. This issue was identified during our ongoing static-analysis research while reviewing kernel code. Fixes: fe8fe7723a3a ("soc: fsl: dpio: register dpio irq handlers after dpio create") Cc: stable@vger.kernel.org Assisted-by: LLM Co-developed-by: Ijae Kim <ae878000@gmail.com> Signed-off-by: Ijae Kim <ae878000@gmail.com> Signed-off-by: Myeonghun Pak <mhun512@gmail.com> Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> Link: https://lore.kernel.org/r/20261002194802.375497-2-mhun512@gmail.com Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
2026-10-09bus: fsl-mc: Annotate fsl_mc_io.portal_virt_addr with __counted_by_ptrBill Wendling
The GCC and Clang compilers provide the __counted_by_ptr attribute, which is used by KASAN and compiler bounds-checking to detect out-of-bounds accesses to pointer fields. In "struct fsl_mc_io", the "portal_virt_addr" pointer points to the MC command portal virtual address. The size of this allocated portal in bytes is tracked by the "portal_size" field within the same structure. Annotate the "portal_virt_addr" pointer field with "__counted_by_ptr(portal_size)" to enable compiler bounds-checking and harden against potential out-of-bounds accesses. Cc: codemender-patching+linux@google.com Assisted-by: LLM Signed-off-by: Bill Wendling <morbo@google.com> Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org> Link: https://lore.kernel.org/r/20260922223538.2287676-1-morbo@google.com Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>