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git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply
Pull power supply fixes from Sebastian Reichel:
"power-supply core:
- prevent unregistering a power supply while a callback runs
power-supply drivers:
- generic-adc-battery: Fix temperature IIO channel conversion
- ds2780: Fix ds2780_get_capacity() returning raw value
- max17042_battery: Fix vmin assigned instead of vmax in DT parsing
- Fix maintenance charge table kernel-doc"
* tag 'for-v7.3-rc' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply:
power: supply: core: prevent unregistering a power supply while a callback runs
power: supply: generic-adc-battery: Fix temperature IIO channel conversion
power: supply: ds2780: Fix ds2780_get_capacity() returning raw value
power: supply: Fix maintenance charge table kernel-doc
power: supply: max17042_battery: Fix vmin assigned instead of vmax in DT parsing
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git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into devel
intel-pinctrl for v7.4-1
* Enable pure platform device enumeration for the Intel pin control
Signed-off-by: Linus Walleij <linusw@kernel.org>
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stm32_gpiolib_register_bank() walks the "gpio-ranges" property with
fwnode_property_get_reference_args(). As documented in
drivers/base/property.c:
* The caller is responsible for calling fwnode_handle_put() on the
* returned @args->fwnode pointer.
The returned reference is never put. The function calls the helper
twice, once directly and then repeatedly in a while loop, and each
call overwrites args, so only the last reference is even reachable
and all the earlier ones are leaked for good.
Put the reference as soon as args.args[] has been consumed, both for
the initial call and for every iteration of the loop.
Found by code review.
Cc: stable@vger.kernel.org
Fixes: bb949ed9b16b ("pinctrl: stm32: Switch to use for_each_gpiochip_node() helper")
Signed-off-by: Ma Ke <make_ruc2021@163.com>
Reviewed-by: Antonio Borneo <antonio.borneo@foss.st.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>
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virtgpu_freeze() waits for the control and cursor queues to drain and
then deletes the virtqueues, but nothing tells the device to stop first.
del_vqs() frees the vring backing, but does not provide a generic device
quiesce operation. In particular, modern virtio-pci keeps enabled queues
active until the device is reset, so the device is left DRIVER_OK with
its queues pointing at memory that has been freed and may be reused while
the guest is suspended. virtio_device_restore() only resets the device
later, on resume.
Reset the device before deleting the virtqueues, the way
virtio_gpu_deinit() already does on removal.
Fixes: cad6a879a7fb ("drm/virtio: Freeze and restore hooks to support suspend and resume")
Cc: stable@vger.kernel.org
Signed-off-by: Yuho Choi <oss.patchbox@gmail.com>
Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Link: https://patch.msgid.link/20260926202040.1313385-1-oss.patchbox@gmail.com
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'arm64-fixes-for-7.3', 'arm64-for-7.4', 'clk-fixes-for-7.3', 'clk-for-7.4', 'drivers-fixes-for-7.3' and 'drivers-for-7.4' into for-next
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Newer SoC like hawi with RSC version v4.5 support 4 byte message read
request instead of default 8 byte on older SoCs. The write request
continues to be 8 bytes.
The CMD_MSGID_LEN field is [3:0] bits. Describe the length bits as a
GENMASK() and use FIELD_PREP() when programming 4-byte or 8-byte message
length.
Tested-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com> #Hawi
Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://patch.msgid.link/20261007-rsc_read-v3-1-7501c014fb37@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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ACPI allow to use relative path in resources, pass the device handle
to acpi_get_gpiod() to allow resolving such path.
Signed-off-by: Alban Bedel <alban.bedel@lht.dlh.de>
Acked-by: Mika Westerberg <westeri@kernel.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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Driver in probe() first iterates over child device nodes, storing the OF
node pointer but does not take the reference to it for the remaining part
of the probe where it is used.
The pointer thus could become invalid if children OF nodes are being
removed from the Devicetree, e.g. by removing OF overlay, while the probe
is being executed. That's a highly theoretical issue, thus it does not
look like bug with any effect.
Nevertheless, make the code logically correct, so acquire the OF node
refcnt for entire lifetime of the device, since the pointer is stored in
each port state container structure.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://patch.msgid.link/20260428132708.95998-4-krzysztof.kozlowski@oss.qualcomm.com
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Svyatoslav Ryhel <clamor95@gmail.com> says:
Add support for auxiliary devices, such as amplifiers, sound-muxes or dsp,
to be added to the sound card.
Link: https://patch.msgid.link/20261013180253.477605-1-clamor95@gmail.com
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* acpi-dock:
ACPI: dock: Retry probing battery docks after hotplug
* acpi-pm:
ACPI: PM: sleep: Drop unused sleep_no_lps0 define
ACPI: PM: Add unused power resource quirk for Casper Excalibur G900
* acpi-video:
ACPI: video: force native backlight on Dell OptiPlex AIO 7410 35W
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* acpica:
ACPICA: actbl2.h: Add bit constants of the Flags field in the IOVT IOMMU structure
* acpi-apei:
ACPI: APEI: accumulate the queued flag across error sections
* acpi-pci:
ACPI: PCI: pci_link: clear driver_data before free
* acpi-cppc:
MAINTAINERS: ACPI: Add a separate CPPC entry
MAINTAINERS: cpufreq: Replace CPPC reviewer
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register_intc_controller() sorts d->prio and d->sense right after
allocating them, with hw->nr_prio_regs and hw->nr_sense_regs as the
element count. The lists hold hw->nr_vectors entries and are only
filled later, by intc_register_irq().
On SH7785, sh7785-irq0123 and sh7785-irq4567 have four vectors but the
SoC's eleven priority registers, so sort() swaps 88 bytes in a 32 byte
kmalloc object at boot. slub_debug=FZPU reports "Right Redzone
overwritten" in kmalloc-32, and v6.5 and v6.6 panic in
__kmem_cache_alloc_node() while registering sh7785-irq0123.
Found with a custom QEMU model of the SH7785LCR. On it, v6.4
sh7785lcr_defconfig boots with SLAB, the defconfig default before v6.5,
and hangs before the console is up when built with SLUB.
Sort the lists once all vectors are registered, with the number of
entries that were added.
Fixes: b59f9f9775e6 ("sh: intc: optimize intc IRQ lookup")
Cc: stable@vger.kernel.org
Assisted-by: LLM
Signed-off-by: Karl Mehltretter <kmehltretter@gmail.com>
Tested-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
Reviewed-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
Signed-off-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
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Configure the core to be driven at 2.5 GT/s Link Speed and ignore any other
speed with a warning. Also drop the 5.0 GT/s Link Speed defines from
Rockchip PCIe header.
The reason is that Shawn Lin from Rockchip has reiterated that there may be
danger of "catastrophic failure" in using their PCIe with 5.0 GT/s speeds.
While Rockchip has done so informally without issuing a proper errata, and
the particulars are thus unknown, this may cause data loss or worse.
This change is corroborated by RK3399 official datasheet [1], which states
maximum link speed for this platform is 2.5 GT/s.
[1] https://opensource.rock-chips.com/images/d/d7/Rockchip_RK3399_Datasheet_V2.1-20200323.pdf
Fixes: 956cd99b35a8 ("PCI: rockchip: Separate common code from RC driver")
Reported-by: Dragan Simic <dsimic@manjaro.org>
Reported-by: Shawn Lin <shawn.lin@rock-chips.com>
Link: https://lore.kernel.org/all/ffd05070-9879-4468-94e3-b88968b4c21b@rock-chips.com/
Signed-off-by: Geraldo Nascimento <geraldogabriel@gmail.com>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Cc: stable@vger.kernel.org
Link: https://patch.msgid.link/7421df7a7b7778ee99363cccfdfabbfa8aa6ab5e.1781622998.git.geraldogabriel@gmail.com
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Drop the 5.0 GT/s Link Speed retraining from Rockchip PCIe Root Complex
Mode Operation, so-called host driver.
The reason is that Shawn Lin from Rockchip has reiterated that there may be
danger of "catastrophic failure" in using their PCIe with 5.0GT/s speeds.
While Rockchip has done so informally without issuing a proper errata, and
the particulars are thus unknown, this may cause data loss or worse.
This change is corroborated by RK3399 official datasheet [1], which states
maximum link speed for this platform is 2.5 GT/s.
[1] https://opensource.rock-chips.com/images/d/d7/Rockchip_RK3399_Datasheet_V2.1-20200323.pdf
Fixes: e77f847df54c ("PCI: rockchip: Add Rockchip PCIe controller support")
Reported-by: Dragan Simic <dsimic@manjaro.org>
Reported-by: Shawn Lin <shawn.lin@rock-chips.com>
Link: https://lore.kernel.org/all/ffd05070-9879-4468-94e3-b88968b4c21b@rock-chips.com/
Signed-off-by: Geraldo Nascimento <geraldogabriel@gmail.com>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Cc: stable@vger.kernel.org
Link: https://patch.msgid.link/68f6353e3a2ea4914de36c42b6906e41282adad3.1781622998.git.geraldogabriel@gmail.com
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Drop the 5.0 GT/s Link Speed retraining code block from Rockchip PCIe EP
driver. The reason is that Shawn Lin from Rockchip has reiterated that
there may be danger of "catastrophic failure" in using their PCIe with 5.0
GT/s speeds.
While Rockchip has done so informally without issuing a proper errata, and
the particulars are thus unknown, this may cause data loss or worse.
This change is corroborated by RK3399 official datasheet [1], which states
maximum link speed for this platform is 2.5 GT/s.
[1] https://opensource.rock-chips.com/images/d/d7/Rockchip_RK3399_Datasheet_V2.1-20200323.pdf
Fixes: bd6e61df4b2e ("PCI: rockchip-ep: Improve link training")
Reported-by: Dragan Simic <dsimic@manjaro.org>
Reported-by: Shawn Lin <shawn.lin@rock-chips.com>
Link: https://lore.kernel.org/all/ffd05070-9879-4468-94e3-b88968b4c21b@rock-chips.com/
Signed-off-by: Geraldo Nascimento <geraldogabriel@gmail.com>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Cc: stable@vger.kernel.org
Link: https://patch.msgid.link/d994f8fb3481bbb8f3972f117334a6e8aea383fb.1781622998.git.geraldogabriel@gmail.com
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Remove a stray white space in function definition. No functional
changes.
Signed-off-by: Francesco Valla <francesco@valla.it>
Link: https://lore.kernel.org/r/20261010-remoteproc_rework-v1-3-cc30dc34d866@valla.it
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
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Let kmemdup_array take care of multiplication and overflows.
While at it, add blank lines in the same function for readability.
Signed-off-by: Francesco Valla <francesco@valla.it>
Link: https://lore.kernel.org/r/20261010-remoteproc_rework-v1-2-cc30dc34d866@valla.it
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
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Instead of repeating the table+offset math in every function that needs
to access the resource linked to a vdev, add a simple helper function
for that to simplify the code a bit.
No functional changes.
Signed-off-by: Francesco Valla <francesco@valla.it>
Link: https://lore.kernel.org/r/20261010-remoteproc_rework-v1-1-cc30dc34d866@valla.it
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
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bui duc phuc <phucduc.bui@gmail.com> says:
This series fixes clock error handling in the Atmel I2S driver by
propagating errors, using optional clock APIs, and simplifying probe
error reporting.
Found by manual code inspection.
Compile-tested only.
Link: https://patch.msgid.link/20261002043856.97295-1-phucduc.bui@gmail.com
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Part 1 of DCD support. Functionality disabled.
Documentation/cxl: Document DPA partition layout and ordering rules
cxl/core: Enforce partition order/simplify partition calls
cxl/mem: Configure dynamic capacity interrupts
cxl/pci: Factor out interrupt policy check
cxl/events: Split event msgnum configuration from irq setup
cxl/cdat: Gather DSMAS data for DCD partitions
cxl/mem: Read dynamic capacity configuration from the device
cxl/mbox: Flag support for Dynamic Capacity Devices (DCD)
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* soc/arm:
MAINTAINERS: Drop arm64 dts/intel path from ARM/SOCFPGA ARCHITECTURE
ARM: tegra: Fix Trun -> Turn typo
ARM: vexpress: fix device_node refcount leak in vexpress_smp_dt_prepare_cpus()
ARM: vexpress: fix device_node refcount leak in vexpress_flags_set()
MAINTAINERS: Change ARM Visconti5 architecture maintenance status to Odd Fixes
ARM: mvebu: fix Cortex-A9 errata selection for Armada 38x
ARM: OMAP2+: remove unused ctrl_module_wkup_44xx.h header
ARM: EXYNOS: Replace __ASSEMBLY__ with __ASSEMBLER__
ARM: s3c: crag6410: use software nodes/properties to set up GPIO keys
Input: samsung-keypad - remove support for platform data
ARM: s3c: crag6410: switch keypad device to software properties
ARM: s3c: register and attach software nodes for Samsung gpio_chips
Input: samsung-keypad - handle compact binding
dt-bindings: input: samsung,s3c6410-keypad: introduce compact binding
ARM: imx6q: remove KSZ9021 PHY fixup
ARM: imx: Fix suspend/resume crash with Clang CFI
ARM: OMAP2+: Replace __ASSEMBLY__ with __ASSEMBLER__
soc: imx: Replace __ASSEMBLY__ with __ASSEMBLER__ in header file
ARM: imx: Replace __ASSEMBLY__ with __ASSEMBLER__
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https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/arm
Microchip AT91 SoC updates for v7.4
This update includes:
- replace __ASSEMBLY__ with __ASSEMBLER__ to avoid confusion
- use of_machine_device_match() instead of open-coding it
* tag 'at91-soc-7.4' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
soc: atmel: Convert to of_machine_device_match()
ARM: at91: Replace __ASSEMBLY__ with __ASSEMBLER__
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Cover the case where the post_run client hook fails: cs_dsp_run() must
return the error and the DSP must not be left marked as running, and a
subsequent run must be able to start it again.
The test fails without the previous patch and passes with it. Full suite
run (UML, KUnit) on top of that patch:
before: Ran 5829 tests: passed: 5825, failed: 4
(cs_dsp_test_run_error_clears_running in each of the four
cs_dsp_callbacks_* suites)
after: Ran 5829 tests: passed: 5829
Signed-off-by: Mingxuan Guo <gmx472@qq.com>
Reviewed-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Link: https://patch.msgid.link/tencent_113ABD187DD2A0C99CB7D4003B81AB94DC07@qq.com
Signed-off-by: Mark Brown <broonie@kernel.org>
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cs_dsp_run() sets dsp->running = true once the core has been started, but
the error path below it only stops and disables the core, leaving the flag
set. The first thing that can fail after that point is the post_run client
hook, and it is reachable in mainline: wm_adsp registers
wm_adsp_event_post_run(), which can fail in wm_adsp_buffer_init().
The core is then stopped and disabled, but dsp->running still reads true,
and that stale state is acted on elsewhere: cs_dsp_coeff_write_ctrl() and
cs_dsp_coeff_read_ctrl() talk to the DSP when ctl->dsp->running is set, and
client drivers use the flag to decide whether the firmware is up (cs35l41
checks cs_dsp.running before its early events and on hibernate/resume).
The flag cannot simply be moved below the hook: post_run hooks such as
wm_adsp_event_post_run() read controls while they run, and
cs_dsp_coeff_read_ctrl() only goes to the DSP when the flag is set.
Clear the flag on the error path, before the core is stopped - the order
cs_dsp_stop() already uses.
Fixes: f6bc909e7673 ("firmware: cs_dsp: add driver to support firmware loading on Cirrus Logic DSPs")
Signed-off-by: Mingxuan Guo <gmx472@qq.com>
Reviewed-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Link: https://patch.msgid.link/tencent_B839C5A92D762B5717B9637A5CFA0841C608@qq.com
Signed-off-by: Mark Brown <broonie@kernel.org>
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dm-verity publishes its root hash and signature state to LSMs in
verity_preresume(). LSMs such as IPE store this information in the block
device's security blob and use it to authorize access to files.
The original LSM integration relied on DM_TARGET_IMMUTABLE to prevent
verity from being replaced by a different target type. However, DM allows
tables containing a DM_TARGET_WILDCARD target to replace immutable
targets. The block device can then retain the old integrity state even
though its data is no longer verified by dm-verity.
Clear the published root hash and signature state in verity_postsuspend()
so that the block device does not retain stale dm-verity attributes after
the verity target is replaced.
Assisted-by: gpt-6-astra
Signed-off-by: Fan Wu <wufan@kernel.org>
Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
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* soc/drivers: (133 commits)
arm64: enable HAVE_SHARED_GPIOS for all ARM64 platforms
bus: arm-cci: Drop cci-control-port node reference in __cci_ace_get_port()
bus: arm-cci: Drop CPU node reference in cci_ace_init_ports()
soc: fsl: dpio: Free the IRQ before releasing the I/O object
soc: fsl: dpio: Fix cleanup on IRQ registration failure
bus: fsl-mc: Annotate fsl_mc_io.portal_virt_addr with __counted_by_ptr
bus: fsl-mc: drop the fwnode links of the dpmacs nodes
soc: fsl: cpm1: tsa: Fix clock leak in tsa_of_parse_tdms()
soc: qcom: geni-se: Drop unused icc_ddr parameter from geni_icc_get()
firmware: qcom: scm: Allow QSEECOM on ThinkPad T14s Gen 7
dt-bindings: mailbox: qcom: Document Maili CPUCP mailbox controller
dt-bindings: spmi: glymur-spmi-pmic-arb: Add compatible for Qualcomm Maili SoC
soc: qcom: pmic_pdcharger_ulog: prevent work requeue during remove
ASoC: dt-bindings: qcom,apr: Add modem_apps GLINK channel for shikra
firmware: qcom: tzmem: disable SHM bridge for SM7125 platform
soc: qcom: ubwc: Add Kalambo UBWC config
firmware: qcom: scm: Allow QSEECOM on Kalambo CRD
firmware: qcom: scm: Allow QSEECOM on the Glymur QCB
soc: qcom: stats: Add stats compatible and config for Shikra
dt-bindings: soc: qcom: stats: Add compatible for Shikra
...
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bnxt_re_dev_uninit() frees the QP table before the RCFW channel is
disabled, so the CREQ tasklet can still look up rcfw->qp_tbl while it
is being freed.
Clear rcfw->qp_tbl under tbl_lock before freeing it, and have the QP
error notification handler bail out if the table is gone.
Fixes: 82f1f575aa13 ("RDMA/bnxt_re: Fix allocation of QP table")
Signed-off-by: Selvin Xavier <selvin.xavier@broadcom.com>
Link: https://patch.msgid.link/20261013140427.256612-3-selvin.xavier@broadcom.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>
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The QP table size depends on the firmware reported max_qp, so it can
be large and a physically contiguous kzalloc may fail. Use kvzalloc_objs()
and free it with kvfree().
Fixes: 82f1f575aa13 ("RDMA/bnxt_re: Fix allocation of QP table")
Signed-off-by: Abhishek Mohapatra <abhishek.mohapatra@broadcom.com>
Signed-off-by: Selvin Xavier <selvin.xavier@broadcom.com>
Link: https://patch.msgid.link/20261013140427.256612-2-selvin.xavier@broadcom.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>
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https://git.kernel.org/pub/scm/linux/kernel/git/chleroy/linux into soc/drivers
FSL SOC Changes for 7.4
Freescale QUICC Engine:
- Fix sparse warnings in GPIO
- Drop GPIOD_FLAGS_BIT_NONEXCLUSIVE
Freescale CPM1 Timeslot Assigner:
- Fix clock leak in tsa_of_parse_tdms()
Data Path I/O:
- Free the IRQ before releasing the I/O object
- Fix cleanup on IRQ registration failure
Freescale Management Complex:
- Annotate fsl_mc_io.portal_virt_addr with __counted_by_ptr
- Drop the fwnode links of the dpmacs nodes
- Register the object drivers after misc_class exists
- Set dma_mask for the DPRC devices
- Fix repeated word 'for' in comment
* tag 'soc_fsl-7.4-1' of https://git.kernel.org/pub/scm/linux/kernel/git/chleroy/linux:
soc: fsl: dpio: Free the IRQ before releasing the I/O object
soc: fsl: dpio: Fix cleanup on IRQ registration failure
bus: fsl-mc: Annotate fsl_mc_io.portal_virt_addr with __counted_by_ptr
bus: fsl-mc: drop the fwnode links of the dpmacs nodes
soc: fsl: cpm1: tsa: Fix clock leak in tsa_of_parse_tdms()
soc: fsl: qe: drop GPIOD_FLAGS_BIT_NONEXCLUSIVE
bus: fsl-mc: register the object drivers after misc_class exists
bus: fsl-mc: set dma_mask for the DPRC devices
bus: fsl-mc: fix repeated word 'for' in comment
soc: fsl: qe: Fix sparse warnings in GPIO
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/drivers
Microchip AT91 SoC updates for v7.4
This update includes:
- replace __ASSEMBLY__ with __ASSEMBLER__ to avoid confusion
- use of_machine_device_match() instead of open-coding it
# -----BEGIN PGP SIGNATURE-----
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# =Cpyo
# -----END PGP SIGNATURE-----
# gpg: Signature made Do 08 Okt 2026 22:40:39 CEST
# gpg: using EDDSA key EC67C7AC7AB0B5A66870A8399E8EB83F3765FBFD
# gpg: Can't check signature: No public key
* tag 'at91-soc-7.4' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
soc: atmel: Convert to of_machine_device_match()
ARM: at91: Replace __ASSEMBLY__ with __ASSEMBLER__
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Convert the sclp_service_call exception table entries to use
EX_TABLE_INSN.
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
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Convert the diag_ftp exception table entry to use EX_TABLE_INSN.
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
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Convert the dasd_diag exception table entry to use EX_TABLE_INSN.
Acked-by: Stefan Haberland <sth@linux.ibm.com>
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
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Convert all cio exception table entries to use EX_TABLE_INSN.
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers
soc/tegra: Changes for v7.4-rc1
Adds various bits of core Tegra SoC support for Tegra410, Tegra264 and
Tegra210-B01. Tegra234 can now be woken up via PCIe. Some references
leak and other fixes round this off.
* tag 'tegra-for-7.4-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: flowctrl: Release OF node reference on error
soc/tegra: pmc: Make sure clk_init_data is fully initialized
soc/tegra: fuse: speedo-tegra210: Support revision B01
soc/tegra: fuse: Support revision B01
soc/tegra: pmc: Add Tegra210B01 support
soc/tegra: cbb: Fix loggger -> logger typo
soc/tegra: pmc: Add PCIe wake event for Tegra234
soc/tegra: fuse: Add Tegra264 support
soc/tegra: pmc: Add PMC support for Tegra410
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Maili camcc is mostly identical to Hawi camcc, with a few clocks
removed, frequency table updates for a few other clocks, and PLL
configuration changes. Hence, reuse the Hawi camera clock controller
driver and extend it for the Qualcomm Maili SoC.
Reviewed-by: Taniya Das <taniya.das@oss.qualcomm.com>
Signed-off-by: Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://patch.msgid.link/20260922-maili_camcc-v4-2-87704b664dde@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Register NoC clocks for PCIe and USB interconnect paths using the
icc-clk framework. Without this, the clocks required to create
interconnect paths and access peripherals connected to these NoCs are
not properly managed.
Also add icc_sync_state to ensure clock states are synchronized after all
consumers have probed.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
Link: https://patch.msgid.link/20260811-ipq9650_icc-v2-2-55b8efbd62c6@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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The USB UTMI reference clock must operate at 24 MHz, as recommended
by the hardware team, for reliable USB operation.
Validation showed that USB 3.2 hub enumeration with USB 2.0 devices
fails when the UTMI reference clock is not configured to the required
24 MHz rate. Configuring the UTMI reference clock to 24 MHz to resolve
the enumeration failure and ensure successful device detection.
Cc: stable@vger.kernel.org
Fixes: 844be6e24afd ("clk: qcom: add Global Clock controller (GCC) driver for IPQ5210 SoC")
Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://patch.msgid.link/20260921-ipq_clk_changes-v1-3-d242e3d49648@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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The USB UTMI reference clock must operate at 24 MHz, as recommended
by the hardware team, for reliable USB operation.
Validation showed that USB 3.2 hub enumeration with USB 2.0 devices
fails when the UTMI reference clock is not configured to the required
24 MHz rate. Configuring the UTMI reference clock to 24 MHz to resolve
the enumeration failure and ensure successful device detection.
Cc: stable@vger.kernel.org
Fixes: 3d89d52970fd ("clk: qcom: add Global Clock controller (GCC) driver for IPQ5332 SoC")
Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://patch.msgid.link/20260921-ipq_clk_changes-v1-2-d242e3d49648@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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The USB UTMI reference clock must operate at 24 MHz, as recommended
by the hardware team, for reliable USB operation.
Validation showed that USB 3.2 hub enumeration with USB 2.0 devices
fails when the UTMI reference clock is not configured to the required
24 MHz rate. Configuring the UTMI reference clock to 24 MHz to resolve
the enumeration failure and ensure successful device detection.
Cc: stable@vger.kernel.org
Fixes: e3fdbef1bab8 ("clk: qcom: Add Global Clock controller (GCC) driver for IPQ5018")
Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://patch.msgid.link/20260921-ipq_clk_changes-v1-1-d242e3d49648@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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clk_alpha_pll_write_config() in the PLL configure function skips writes
to PLL registers when the configured value is 0. However, hardware
requires USER_CTL_U and CONFIG_CTL_U2 to be explicitly programmed to 0
for a few rivian PLLs.
Add a clk_regs_configure() callback to ensure these rivian PLL registers
are correctly initialized on Glymur, SM8750, and Kaanapali platforms.
Fixes: 97255eedd690 ("clk: qcom: camcc-glymur: Add camera clock controller driver")
Fixes: f9580bafd39c ("clk: qcom: camcc: Add camera clock controller driver for SM8750 SoC")
Fixes: 92aae35f667c ("clk: qcom: camcc: Add support for camera clock controller for Kaanapali")
Signed-off-by: Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com>
Reviewed-by: Taniya Das <taniya.das@oss.qualcomm.com>
Link: https://patch.msgid.link/20260801-cam-rivian-pll-config-fix-v1-1-6918d58cd823@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Describe the always-on branches in a critical_cbcrs array and reference
it through qcom_cc_driver_data. Let qcom_cc_really_probe() enable these
branches instead of programming them directly in the driver's probe.
Keep separate CBCR arrays for SM8350 and SC8280XP to preserve their
different XO clock register offsets.
Assisted-by: LLM
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://patch.msgid.link/20260924-clk-qcom-rework-legacy-always-on-clocks-v2-48-1479443ee016@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Describe the always-on branches in a critical_cbcrs array and reference
it through qcom_cc_driver_data. Let qcom_cc_really_probe() enable these
branches instead of programming them directly in the driver's probe.
Assisted-by: LLM
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://patch.msgid.link/20260924-clk-qcom-rework-legacy-always-on-clocks-v2-47-1479443ee016@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Describe the always-on branches in a critical_cbcrs array and reference
it through qcom_cc_driver_data. Let qcom_cc_really_probe() enable these
branches instead of programming them directly in the driver's probe.
Assisted-by: LLM
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://patch.msgid.link/20260924-clk-qcom-rework-legacy-always-on-clocks-v2-46-1479443ee016@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Describe the always-on branches in a critical_cbcrs array and reference
it through qcom_cc_driver_data. Let qcom_cc_really_probe() enable these
branches instead of programming them directly in the driver's probe.
Assisted-by: LLM
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://patch.msgid.link/20260924-clk-qcom-rework-legacy-always-on-clocks-v2-45-1479443ee016@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Describe the always-on branches in a critical_cbcrs array and reference
it through qcom_cc_driver_data. Let qcom_cc_really_probe() enable these
branches instead of programming them directly in the driver's probe.
Assisted-by: LLM
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://patch.msgid.link/20260924-clk-qcom-rework-legacy-always-on-clocks-v2-44-1479443ee016@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Describe the always-on branches in a critical_cbcrs array and reference
it through qcom_cc_driver_data. Let qcom_cc_really_probe() enable these
branches instead of programming them directly in the driver's probe.
Move the PLL register setup into the clk_regs_configure callback so it
still follows the SYSNOC branch enable. Attach this data only to the
LPASS core clock controller descriptor.
Assisted-by: LLM
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://patch.msgid.link/20260924-clk-qcom-rework-legacy-always-on-clocks-v2-43-1479443ee016@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Describe the always-on branches in a critical_cbcrs array and reference
it through qcom_cc_driver_data. Let qcom_cc_really_probe() enable these
branches instead of programming them directly in the driver's probe.
Assisted-by: LLM
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://patch.msgid.link/20260924-clk-qcom-rework-legacy-always-on-clocks-v2-42-1479443ee016@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Describe the always-on branches in a critical_cbcrs array and reference
it through qcom_cc_driver_data. Let qcom_cc_really_probe() enable these
branches instead of programming them directly in the driver's probe.
Assisted-by: LLM
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://patch.msgid.link/20260924-clk-qcom-rework-legacy-always-on-clocks-v2-41-1479443ee016@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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