summaryrefslogtreecommitdiff
path: root/drivers/gpu
AgeCommit message (Collapse)Author
2026-10-01drm/xe/vm: Do not dma_fence_put zero fences in err_out pathJonathan Cavitt
It is not necessary to iterate over and dma_fence_put current_fence fences in the err_out path of ops_execute because current_fences cannot be non-zero when jumping to that section of code. Caught by static analysis. Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com> Cc: Matthew Brost <matthew.brost@intel.com> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com> Cc: Shuicheng Lin <shuicheng.lin@intel.com> Cc: Maarten Lankhorst <dev@lankhorst.se> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Signed-off-by: Matthew Brost <matthew.brost@intel.com> Link: https://patch.msgid.link/20260929205606.1076177-1-jonathan.cavitt@intel.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2026-10-01drm/xe: Implement print vfunc for page fault info loggingBrian Nguyen
Add a print vfunc to xe_pagefault_ops so different producer backends can log specific relevant debug info while keeping the consumer layer free of potential backend-specific formatting logic. Consumer-specific error prints are handled by passing as input into the vfunc. v2: - Decode producer specific fields for print message. (Matthew) - Combine consumer and producer prints to one print call. (Sashiko) v3: - Change assert to WARN_ON_ONCE. (Matthew) Suggested-by: Stuart Summers <stuart.summers@intel.com> Signed-off-by: Brian Nguyen <brian3.nguyen@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Cc: Matthew Brost <matthew.brost@intel.com> Signed-off-by: Matthew Brost <matthew.brost@intel.com> Link: https://patch.msgid.link/20260928222241.3815153-2-brian3.nguyen@intel.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2026-10-01drm/xe/guc: Let xe_guc_ct_send_locked() callers reserve G2H creditSujaritha Sundaresan
Commit d4a7e1611716 ("drm/xe: batch CT pagefault acks with periodic flush") added a defer_flush argument to xe_guc_ct_send_locked(). At the same time it dropped the g2h_len and num_g2h arguments, which had no in-tree users, and hardcoded a zero G2H reservation. That leaves no way to send an H2G that expects a G2H reply while already holding ct->lock. The G2H receive path (parse_g2h_event() and g2h_fast_path()) releases credit unconditionally for replies such as DEREGISTER_CONTEXT_DONE, SCHED_CONTEXT_MODE_DONE and TLB_INVALIDATION_DONE. If the credit was never reserved, __g2h_release_space() reports an "Invalid G2H release" and marks the CT dead with CT_DEAD_G2H_RELEASE. Replacing two u32 arguments with a bool also means a caller written against the old signature can silently change meaning when the two reservation arguments get merged into one: the call still compiles, still sends the H2G, and loses only the reservation. Add g2h_len and num_g2h back, ahead of defer_flush, so that the function matches xe_guc_ct_send() and forwards both values to guc_ct_send_locked(). The kernel-doc now says when a reservation is required and that a non-zero reservation must not be made from a G2H handler, because waiting for credit can dequeue G2H inline. The only existing caller, the pagefault ack path, does not expect a reply. It passes 0, 0 and behaves exactly as before. Cc: Matthew Brost <matthew.brost@intel.com> Signed-off-by: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Link: https://patch.msgid.link/20260929050342.221789-1-sujaritha.sundaresan@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2026-10-01drm/xe/xe3p: Force non-compressible memory reads to 256B overfetchesDaniel Charles
Add a tuning entry to set bit 14 (NONCOMPMEMRD256BOVRFETCHEN) of L3SQCREG2 for Xe3p and later platforms. BSpec: 72161, 59927 Signed-off-by: Daniel Charles <daniel.charles@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patch.msgid.link/20260929200839.843116-1-daniel.charles@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2026-10-01drm/xe/nvl-s: Enable PXP for NVL-SAlan Previn
Now that the GSC FW is defined, we can enable PXP for NVL-S. The feature will only be turned on if the binary is found on disk. Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com> Reviewed-by: Julia Filipchuk <julia.filipchuk@intel.com> Link: https://patch.msgid.link/20260923183600.1186943-6-alan.previn.teres.alexis@intel.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2026-10-01drm/xe/gsc: Define GSC for NVL-SAlan Previn
NVL-S is identified by GSC major version 108. The compatibility version is 0.0. Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com> Reviewed-by: Julia Filipchuk <julia.filipchuk@intel.com> Link: https://patch.msgid.link/20260923183600.1186943-5-alan.previn.teres.alexis@intel.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2026-10-01drm/xe/cri: Expose device UID through sysfsBadal Nilawar
Expose a read-only sysfs attribute, device_uid, that reports the GPU SoC's unique identifier. Bspec: 53048, 53049 Assisted-by: Claude:claude-opus-4.8 Signed-off-by: Badal Nilawar <badal.nilawar@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patch.msgid.link/20260929171823.3811737-2-badal.nilawar@intel.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2026-10-01drm/xe/xe3p_lpg: Add support for Wa_16030224309Tangudu Tilak Tirumalesh
Opt in to the GuC workaround, to ignore context completion status with preemption or preemption-to-idle in the CSB when the multi-queue feature is enabled, which is supported on Graphics Version 35.10. This WA is supported starting from GuC 70.73. Apply Wa_16030224309 to Graphics Version 35.10. v2: Place this code near to KLV WAs. -Lin Shuicheng Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com> Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Reviewed-by: Shuicheng Lin <shuicheng.lin@intel.com> Link: https://patch.msgid.link/20260925172722.238924-1-tilak.tirumalesh.tangudu@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2026-10-01drm/aspeed: Balance the display clock enable on teardownMyeonghun Pak
aspeed_gfx_load() enables the display clock without checking the return value and never disables it on probe failure or removal. devm_clk_get() only releases the clock reference, leaving the enable unbalanced. Use devm_clk_get_enabled() to handle enable failures and automatically disable and unprepare the clock on probe failure or removal. This issue was identified during our ongoing static-analysis research while reviewing kernel code. Fixes: 4f2a8f5898ec ("drm: Add ASPEED GFX driver") Co-developed-by: Ijae Kim <ae878000@gmail.com> Signed-off-by: Ijae Kim <ae878000@gmail.com> Signed-off-by: Myeonghun Pak <mhun512@gmail.com> Assisted-by: OpenAI:GPT-5.6 Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patch.msgid.link/20260913223019.89651-1-mhun512@gmail.com Link: https://patch.msgid.link/20260905080426.34224-1-kmehltretter@gmail.com
2026-10-01drm/fb-helper: defer setup when fbdev_probe() fails, not just on -EAGAINNguyen Ngoc Thang
__drm_fb_helper_initial_config_and_unlock() calls drm_client_modeset_probe() first, which already fills in each mode_set->mode/num_connectors for every connected output, and only afterwards calls drm_fb_helper_single_fb_probe() to create fb_helper->fb and wire it into those mode_sets via drm_setup_crtcs_fb(). If drm_fb_helper_single_fb_probe() fails with anything other than -EAGAIN (e.g. dev->driver->fbdev_probe() itself fails), the function bails out before drm_setup_crtcs_fb() runs and before setting fb_helper->deferred_setup. The client is left with mode_sets that have a mode and connectors but mode_set->fb == NULL, and nothing marks this fb_helper as needing a retry. __drm_fb_helper_restore_fbdev_mode_unlocked() only skips committing when fb_helper->deferred_setup is set, so a later .restore() call (drm_lastclose() on process exit, in this report) commits the stale mode_set through drm_client_modeset_commit() -> drm_client_modeset_commit_atomic() -> __drm_atomic_helper_set_config(), which hits WARN_ON(!set->fb). Mark fb_helper->deferred_setup on any drm_fb_helper_single_fb_probe() failure, not just -EAGAIN, so restore keeps skipping the commit until a later hotplug event successfully re-probes and re-populates mode_set->fb. The real error code is still returned to the caller unchanged. Reported-by: syzbot+ca23c8570669ead78867@syzkaller.appspotmail.com Closes: https://syzkaller.appspot.com/bug?extid=ca23c8570669ead78867 Fixes: ca91a2758fce ("drm/fb-helper: Support deferred setup") Cc: stable@vger.kernel.org Signed-off-by: Nguyen Ngoc Thang <ngocthang2710.1999@gmail.com> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patch.msgid.link/20260927075434.72658-1-ngocthang2710.1999@gmail.com Link: https://patch.msgid.link/20260917154743.1621-1-shechenglong@xfusion.com
2026-10-01drm/msm/dp: add stream-aware link register accessorsYongxing Mou
DisplayPort MST uses multiple stream-specific register spaces. Streams 0 and 1 share the primary link register block with different register offsets, while streams 2 and 3 use dedicated MST link register blocks. Add stream-aware register access helpers that translate stream-specific register offsets and route accesses to the appropriate register space based on the stream id. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/756910/ Link: https://lore.kernel.org/r/20260929-msm-dp-mst-v7-7-4b81473185e7@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm/msm/dp: add MST stream register definitionsYongxing Mou
Add the stream-1 (DP1) and MST-link register definitions together with msm_dp_stream_reg(), a helper that translates stream-0 register offsets into their stream-specific equivalents. Keeping the register definitions and translation helper together ensures that all supported mappings are defined in one place. Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/756909/ Link: https://lore.kernel.org/r/20260929-msm-dp-mst-v7-6-4b81473185e7@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm/msm/dp: add support for programming p1/p2/p3 register blocksAbhinav Kumar
Each MST stream uses its own pixel register block. Extend pixel register access beyond p0 to support up to four streams. Not all controllers provide all four blocks. Check for optional resources before mapping them to avoid misleading probe errors when they are absent, while propagating mapping failures for resources that are present. Track each block's size separately so register snapshots use the size of the corresponding resource. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/756907/ Link: https://lore.kernel.org/r/20260929-msm-dp-mst-v7-5-4b81473185e7@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm/msm/dp: introduce stream_id for each DP panelAbhinav Kumar
With MST, each DP controller can handle multiple streams. There shall be one dp_panel for each stream but the dp_display object shall be shared among them. To represent this abstraction, add a stream_id field to struct msm_dp_panel and introduce the msm_dp_stream_id enum. For SST, the field is initialized to DP_STREAM_0. In the MST path, each panel will be assigned an actual stream_id at stream-enable time by the MST layer (added in later patches). Use the stream ID to control the pixel clock of that respective stream by extending the clock handles and state tracking of the DP pixel clock to an array of max supported streams. The maximum streams currently is 4. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/756906/ Link: https://lore.kernel.org/r/20260929-msm-dp-mst-v7-4-4b81473185e7@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm/msm/dp: drop redundant config_ctrl_link() from msm_dp_ctrl_on_stream()Yongxing Mou
REG_DP_CONFIGURATION_CTRL contains link-wide state and is already programmed during link training. Calling config_ctrl_link() from msm_dp_ctrl_on_stream() rewrites the same configuration and is unnecessary. Remove the redundant call. Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/756903/ Link: https://lore.kernel.org/r/20260929-msm-dp-mst-v7-3-4b81473185e7@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm/msm/dp: Pass panel to msm_dp_ctrl_config_msa()Yongxing Mou
MST requires the stream ID to select the SOFTWARE_MVID/NVID registers, but msm_dp_ctrl_config_msa() currently has no access to it. Pass panel to the function and derive the pixel clock and pixel format from panel->msm_dp_mode, preparing for MST register programming. No functional change. Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/756901/ Link: https://lore.kernel.org/r/20260929-msm-dp-mst-v7-2-4b81473185e7@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm/msm/dp: move link-level teardown from display_disable to display_unprepareAbhinav Kumar
msm_dp_display_disable() currently mixes stream-level shutdown (disable VSC SDP, off pixel clk, clear power_on) with link-level teardown (PSM config when sink_count==0, off_link, PHY re-init or host PHY exit). For DP MST the same link is shared across multiple streams, so disabling one stream must not tear down the link. Move the link-level steps into msm_dp_display_unprepare() so that display_disable() handles only the per-stream sequence, mirroring the split already present on the prepare path (display_prepare_link vs display_set_mode / display_enable). SST behaviour is unchanged: atomic_post_disable() still calls display_disable() followed by display_unprepare() in the same order, and the cached dp->panel used inside unprepare is the same panel that was previously passed in. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/756899/ Link: https://lore.kernel.org/r/20260929-msm-dp-mst-v7-1-4b81473185e7@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm: renesas: rz-du: Add support for RZ/G3L LVDS encoderBiju Das
Add support for the RZ/G3L LVDS encoder driver. It operates in single-link mode with 4 lanes (Data) + 1 lane (Clock) and supports pixel clock rates from 25 to 87 MHz. The LVDS module cannot be used at the same time as MIPI-DSI. However, LVDS and the DSI interface share a peripheral clock and the MIPI_DSI_PRESET_N reset signal. Also, the MIPI_DSI_CMN_RSTB and MIPI_DSI_ARESET_N reset signals must be asserted before using the LVDS module. Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Tested-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Reviewed-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Link: https://patch.msgid.link/20261001094041.135697-8-biju.das.jz@bp.renesas.com Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
2026-10-01drm: renesas: rz-du: Add RZ/G3L (R9A08G046) DU supportBiju Das
Add Display Unit support for the Renesas RZ/G3L SoC (R9A08G046). It is similar to the one found on RZ/G2L, but has LVDS support. Reviewed-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Link: https://patch.msgid.link/20261001094041.135697-7-biju.das.jz@bp.renesas.com Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
2026-10-01drm: renesas: rzg2l_mipi_dsi: Add RZ/G3L MIPI DSI supportBiju Das
Add support for the MIPI DSI controller found on the Renesas RZ/G3L (R9A08G046) SoC. The D-PHY global timing table of RZ/G3L SoC different compared to the other SoCs. Introduce a dedicated D-PHY global timing table rzg3l_mipi_dsi_global_timings and wire it up via a new rzg3l_mipi_dsi_info hw_info variant for RZ/G3L SoC. Reviewed-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Link: https://patch.msgid.link/20261001094041.135697-6-biju.das.jz@bp.renesas.com Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
2026-10-01drm: renesas: rzg2l_mipi_dsi: Add support for DSI PWRRDYBiju Das
The register for controlling power to the DSI region is in the SYSC (System Controller) block. Add support for controlling the DSI PWRRDY signal so the driver can efficiently manage power to the DSI region. Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://patch.msgid.link/20261001094041.135697-5-biju.das.jz@bp.renesas.com Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
2026-10-01drm: renesas: rzg2l_mipi_dsi: Move global timings into hardware info structBiju Das
Move rzg2l_mipi_dsi_global_timings and its array size out of the hardcoded ARRAY_SIZE reference in rzg2l_mipi_dsi_dphy_init() and into the struct rzg2l_mipi_dsi_hw_info. This allows future hardware variants to supply their own timing tables rather than sharing a single global array, making the driver more extensible without code duplication. Reviewed-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Link: https://patch.msgid.link/20261001094041.135697-4-biju.das.jz@bp.renesas.com Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
2026-10-01drm: renesas: rzg2l_mipi_dsi: Add activation_dly to hw_infoBiju Das
Move the post-reset activation delay into the hw_info structure as activation_dly, allowing SoC-specific values to be defined per compatible. This prepares the driver for supporting SoCs that require a different delay after reset deassertion. Reviewed-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Link: https://patch.msgid.link/20261001094041.135697-3-biju.das.jz@bp.renesas.com Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
2026-10-01drm: renesas: rzg2l_mipi_dsi: Add dphyctrl0_init_val to hw_infoBiju Das
Move the DSIDPHYCTRL0 initialization value into the hw_info structure as dphyctrl0_init_val, allowing SoC-specific D-PHY control register initialization to be defined per compatible. This prepares the driver for supporting SoCs that require a different initial DSIDPHYCTRL0 value. Reviewed-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Link: https://patch.msgid.link/20261001094041.135697-2-biju.das.jz@bp.renesas.com Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
2026-10-01drm/intel: rename I915_GTT_VIEW_* enumerations to INTEL_GTT_VIEW_*Jani Nikula
Make the I915_GTT_VIEW_* enumerators less i915 specific, and rename them INTEL_GTT_VIEW_*. $ sed -i 's/I915_GTT_VIEW_/INTEL_GTT_VIEW_/g' -- $(git grep -l I915_GTT_VIEW_) Reviewed-by: Maarten Lankhorst <dev@lankhorst.se> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/6e66fd6b61e361ffde316e5399baf9432383ced5.1790780340.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2026-10-01drm/i915/debugfs: use the intel_gtt_view_is_*() helpers moreJani Nikula
Prefer using the intel_gtt_view_is_*() helpers instead of comparing the view type directly. Reviewed-by: Maarten Lankhorst <dev@lankhorst.se> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/6d9279ce0522f6768f55fb6c760862fdb92ffc03.1790780340.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2026-10-01drm/i915/selftests: use intel_gtt_view_is_*() helpers moreJani Nikula
Prefer using the intel_gtt_view_is_*() helpers instead of comparing the view type directly. v3: Use view, not vma->gtt_view even more (Ville) v2: Use view, not vma->gtt_view at the end (Sashiko) Reviewed-by: Maarten Lankhorst <dev@lankhorst.se> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/350f0be2c56ae4ac7b7bb97186f4d501faa7bb4e.1790780340.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2026-10-01drm/i915/vma: use intel_gtt_view_is_*() helpers moreJani Nikula
Prefer using the intel_gtt_view_is_*() helpers instead of comparing the view type directly. Reviewed-by: Maarten Lankhorst <dev@lankhorst.se> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/5bc8331cab1d15855b378bd01c76fb0fc4be5c7f.1790780340.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2026-10-01drm/i915/gem: use intel_gtt_view_is_*() helpers moreJani Nikula
Prefer using the intel_gtt_view_is_*() helpers instead of comparing the view type directly. Reviewed-by: Maarten Lankhorst <dev@lankhorst.se> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/1b7f309d0c5c5891caa2ec84c04ce8a4438f1207.1790780340.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2026-10-01drm/xe/display: use intel_gtt_view_is_*() helpers moreJani Nikula
Prefer using the intel_gtt_view_is_*() helpers instead of comparing the view type directly. Reviewed-by: Maarten Lankhorst <dev@lankhorst.se> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/e05bf916d46007f8e655beb6c31748a8f69e09f3.1790780340.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2026-10-01drm/intel: rename i915_gtt_view* struct/enum to intel_gtt_view*Jani Nikula
Make enum i915_gtt_view_type and struct i915_gtt_view less i915 specific, and rename them enum intel_gtt_view_type and struct intel_gtt_view, respectively. $ sed -i 's/i915_gtt_view/intel_gtt_view/g' -- $(git grep -l i915_gtt_view) Reviewed-by: Maarten Lankhorst <dev@lankhorst.se> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/4ca4ad3d11b0f8167a54d69d6eef0c8a78218c53.1790780340.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2026-10-01drm/intel: rename i915_gtt_view_is_*() helpers to intel_gtt_view_is_*()Jani Nikula
Make the i915_gtt_view_is_*() helpers less i915 specific, and rename them intel_gtt_view_is_*(). $ sed -i 's/i915_gtt_view_is_/intel_gtt_view_is_/g' -- $(git grep -l i915_gtt_view_is_) Reviewed-by: Maarten Lankhorst <dev@lankhorst.se> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/8230339be1738a1f7c87047f2516dfa66b03d9aa.1790780340.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2026-10-01drm/intel: move i915_gtt_view_types.h to include/drm/intelJani Nikula
The i915 and xe drivers share i915_gtt_view_types.h from i915 source. Move it to include/drm/intel/gtt_view_types.h. Remove the i915 compat header. v2: Keep comment for header guard #endif (Ville) Reviewed-by: Maarten Lankhorst <dev@lankhorst.se> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/174f7e26be755b29a1286bf8b8ef0342dcc083a6.1790780340.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2026-10-01drm/panel: select DRM_KMS_HELPERSasha Levin
Since the panel_bridge code moved into drm_panel.c, any config with DRM built in but without the KMS helpers fails to link, for example arc haps_hs_smp_defconfig with allnoconfig and the kselftest fragment: arc-elf32-ld: drivers/gpu/drm/drm_panel.o:(.rodata+0x28): undefined reference to `drm_atomic_helper_bridge_duplicate_state' arc-elf32-ld: drivers/gpu/drm/drm_panel.o:(.rodata+0x2c): undefined reference to `drm_atomic_helper_bridge_destroy_state' ... With DRM=m, modpost fails the same way: ERROR: modpost: drivers/gpu/drm/drm_panel.ko: symbol 'drm_atomic_helper_bridge_duplicate_state' undefined! The panel_bridge used to live in bridge/panel.c, which was part of drm_kms_helper and was therefore only built when DRM_KMS_HELPER was enabled. drm_panel.c is built for DRM_PANEL instead, which DRM_PANEL_BRIDGE selects whenever DRM_BRIDGE is set, and DRM_BRIDGE is enabled for every DRM config. Nothing on that path selects DRM_KMS_HELPER, so the bridge and connector helpers used by the moved code can be missing. The panel_bridge code in drm_panel.c is built unconditionally, so make DRM_PANEL select DRM_KMS_HELPER. Reported-by: kernelci.org bot <bot@kernelci.org> Closes: https://d.kernelci.org/i/maestro:9ed7f4b210fa7c1d3bb109b0fcd62285e98c5b81 Fixes: aa8a8c7e4641 ("drm/bridge: panel: move all code to drm_panel.c") Assisted-by: LLM Signed-off-by: Sasha Levin <sashal@kernel.org> Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com> Tested-by: Luca Ceresoli <luca.ceresoli@bootlin.com> Link: https://patch.msgid.link/20260929114828.3260345-1-sashal@kernel.org Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
2026-10-01drm/fbdev: Move fbdev helpers into client libraryThomas Zimmermann
DRM's fbdev helpers are for the fbdev-emulation clients. Move them into the client-library module. Fix include statements throughout DRM drivers. While at it, rename the files from drm_fb_helper to drm_fbdev_helper. The old name was too reminiscent of DRM's framebuffer code. The GEM support code for fbdev remains part of DRM's memory managers. v4: - fix the depedendencies from v3 v3: - remove obsolete dependencies from Kconfig v2: - update armada und docs Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://patch.msgid.link/20260928080323.23909-3-tzimmermann@suse.de
2026-10-01drm/fbdev: Move fbdev module parameters next to module initThomas Zimmermann
Define the parameters for fbdev emulation in the source file with the module-initialization and exit code of drm_kms_helper.ko. The parameters control some aspects of DRM's fbdev emulation. Common usage looks like drm_kms_helper.drm_fbdev_overalloc=200 on the kernel's command line. This has been possible for many years and changing it would likely upset users. The emulation code is supposed to be moved into the module for DRM clients. Keeping the parameters in drm_kms_helper.ko avoids breaking systems the use them in the way described above. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://patch.msgid.link/20260928080323.23909-2-tzimmermann@suse.de
2026-10-01drm/imx: replace struct drm_simple_display_pipe with regular atomic helpersZe Huang
Convert i.MX LCDC to explicit primary plane, CRTC and encoder objects. Keep no-scaling plane check and GEM framebuffer prepare callback from simple-KMS path. Wire the vblank lifecycle explicitly with CRTC vblank callbacks and drm_crtc_vblank_on()/drm_crtc_vblank_off(). Use the old CRTC state in the disable path for clock unwinding so the clock reference count remains paired with the previous active state. Use the atomic_create_state helpers with drm_mode_config_create_initial_state() in probe, and drm_crtc_vblank_atomic_flush() for the flush callback. Signed-off-by: Ze Huang <ze.huang@oss.qualcomm.com> Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patch.msgid.link/20260919-b4-imx-simple-kms-v4-v4-2-53b1fdf4589e@oss.qualcomm.com
2026-10-01drm/imx/lcdc: avoid duplicate clk_per enableZe Huang
The simple-KMS helper calls the pipe update after enabling the CRTC. On an enable commit, imx_lcdc_pipe_enable() already programs the mode and enables clk_per. The following pipe update sees the plane move from no CRTC to the active CRTC, treats it as a mode update, and calls imx_lcdc_update_hw_registers() again. That second call has no old CRTC state to disable clk_per first, but it enables clk_per again at the end. The disable path only drops one reference, leaving clk_per enabled after each on/off cycle. Skip the register update from the pipe update path when the CRTC already needs a modeset. The enable path has already programmed the hardware for that commit; keep the event handling in pipe update unchanged. Fixes: c87e859cdeb5 ("drm/imx/lcdc: Implement DRM driver for imx25") Acked-by: Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by: Ze Huang <ze.huang@oss.qualcomm.com> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patch.msgid.link/20260919-b4-imx-simple-kms-v4-v4-1-53b1fdf4589e@oss.qualcomm.com
2026-10-01drm/msm/dpu: Fix GAMMA LUT for sm8750 related DPUsRob Clark
Add missing GC block. Fixes GAMMA LUT on glymur/knp/etc. Reported-by: Connor Abbott <cwabbott0@gmail.com> Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/757345/ Link: https://lore.kernel.org/r/20260930152645.22194-1-robin.clark@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm/msm/dp: Initialize the debugfs connector pointerXilin Wu
The debugfs cleanup removed the connector assignment from the debug context, but the video-pattern test files still dereference that pointer to check connector status. Reading those files can therefore dereference NULL. Store the supplied connector before creating the debugfs files. Fixes: ab8420418c2e ("drm/msm/dp: cleanup debugfs handling") Assisted-by: LLM Signed-off-by: Xilin Wu <sophon@radxa.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/757261/ Link: https://lore.kernel.org/r/20260930-msm-dp-hdr10-v1-11-dbbf8b2b42bc@radxa.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm/msm/dp: Serialize HPD state updatesXilin Wu
The plug and detect paths hold plugged_lock while accessing the sink state, but IRQ-HPD processing updates the same state without that lock. Unplug also changes the video-test flag and AUX transfer gate before acquiring the lock. Cover those updates with plugged_lock so that users of the connection lock cannot observe partially updated HPD state. This also lets stream failure cleanup decide whether to preserve AUX while excluding HPD processing. Assisted-by: LLM Signed-off-by: Xilin Wu <sophon@radxa.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/757251/ Link: https://lore.kernel.org/r/20260930-msm-dp-hdr10-v1-4-dbbf8b2b42bc@radxa.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm: msm: mdp5: Add MDP5 configuration for MSM8952Muzaffer Kadir
Add the mdp5_cfg_hw entry for MDP5 version v1.12 found on MSM8952. Signed-off-by: Muzaffer Kadir <muzafferkadir@mainlining.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/755197/ Link: https://lore.kernel.org/r/20260921-msm8952-initial-support-v3-13-b96fd3fe298b@mainlining.org [DB: dropped invalid pipe_cursor, it's a part of LM] Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01Merge tag 'exynos-drm-next-for-v7.4' of ↵Dave Airlie
git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next Exynos FIMD fixes - Fix clock leak on resume error path. - Fix Sparse warnings by adding missing __iomem annotation. Exynos VIDI cleanup - Replace kmalloc() and copy_from_user() with memdup_user(). Signed-off-by: Dave Airlie <airlied@redhat.com> From: Inki Dae <inki.dae@samsung.com> Link: https://patch.msgid.link/20260928130514.47167-1-inki.dae@samsung.com
2026-10-01Merge tag 'topic/pci-vgaarb-rework-2026-10-01' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/kernel into drm-next pci/vgaarb rework for drm/vfio This reworks the vgaarb API to be a bit more sane. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Dave Airlie <airlied@gmail.com> Link: https://patch.msgid.link/CAPM=9tzd3LteJG-Au=na-_X5Rff4tacFZ3X_cp5g0bCcQkV_jA@mail.gmail.com
2026-10-01drm/msm/dsi: Fix VM leak in dsi_tx_buf_alloc_6g()Wentao Liang
dsi_tx_buf_alloc_6g() takes a reference to the kms VM with drm_gpuvm_get() and stores it in msm_host->vm. If msm_gem_kernel_new() fails, the function returns early without dropping that reference. Since msm_host->tx_gem_obj is cleared on the error path, msm_dsi_tx_buf_free() will never see a non-NULL tx_gem_obj and thus never calls drm_gpuvm_put(), leaking the VM reference. Drop the VM reference and clear msm_host->vm on the error path. Fixes: 5e05be782645 ("drm/msm/dsi: free TX buffer in unbind") Cc: stable@vger.kernel.org Signed-off-by: Wentao Liang <vulab@iscas.ac.cn> Reviewed-by: Rob Clark <rob.clark@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/754332/ Link: https://lore.kernel.org/r/20260916175738.2089950-1-vulab@iscas.ac.cn Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm/msm/mdp5: drop cursor pipe for msm8x76Dmitry Baryshkov
The MSM8976/56 family of platforms doe't have a separate cursor plane. Instead the cursor is a part of the LM block. Drop the erroneously added pipe configuration, letting LM to provide a legacy cursor instead. Fixes: 1860f2a8b8b1 ("drm/msm/mdp5: Add configuration for msm8x76") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/753150/ Link: https://lore.kernel.org/r/20260914-mdp5-fix-cursor-v1-1-9fba3ace6cb9@oss.qualcomm.com
2026-10-01drm/msm/dsi: Fix indentation of if block in dsi_mgr_bridge_mode_valid()Krzysztof Kozlowski
Correct confusing indentation within else {} block in dsi_mgr_bridge_mode_valid(). Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/752659/ Link: https://lore.kernel.org/r/20260911-drm-msm-hdmi-fixes-before-eliza-v4-6-87bdb9f1987f@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm/msm: Properly handle msm_ioremap() without nameKrzysztof Kozlowski
msm_ioremap() accepts being called without name of the region to map and in such case maps by index 0. However error paths still use the name in error message. Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Fixes: c8afe684c95c ("drm/msm: basic KMS driver for snapdragon") Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/752660/ Link: https://lore.kernel.org/r/20260911-drm-msm-hdmi-fixes-before-eliza-v4-5-87bdb9f1987f@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm/msm/hdmi_bridge: Drop redundant initialization in msm_hdmi_bridge_init()Krzysztof Kozlowski
Local 'struct drm_bridge *bridge' variable is assigned in ~13th line of the function, before any first use, thus explicit NULL initialization is not necessary. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/752657/ Link: https://lore.kernel.org/r/20260911-drm-msm-hdmi-fixes-before-eliza-v4-4-87bdb9f1987f@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm/msm/hdmi_bridge: Correct poweroff/audio cleanup order in post_disableKrzysztof Kozlowski
Turning off the power in msm_hdmi_bridge_atomic_post_disable() should follow reverse order of powering up, not only because it is logical, but also because msm_hdmi_audio_update() accesses registers thus block should still be powered on. Depending on specific timing, existing code could have accesses to MMIO of powered off block. Cc: stable@vger.kernel.org Fixes: c0c0d9eeeb8d ("drm/msm: hdmi audio support") Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/752655/ Link: https://lore.kernel.org/r/20260911-drm-msm-hdmi-fixes-before-eliza-v4-3-87bdb9f1987f@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>