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authorStephen Rothwell <sfr@canb.auug.org.au>2022-06-28 10:59:28 +1000
committerStephen Rothwell <sfr@canb.auug.org.au>2022-06-28 10:59:28 +1000
commit92ca5327741fb8d315b14bb26ef8e6db674a4eaf (patch)
tree4d413f9086eab74be4915c72978ee240e7178555 /drivers/gpu
parent6822c6fd77ea90d5bac3451bf4094272eaa8a295 (diff)
parent9715181d17b4309cc4813ae7793fe6cef43a0bc5 (diff)
downloadlinux-next-92ca5327741fb8d315b14bb26ef8e6db674a4eaf.tar.gz
linux-next-92ca5327741fb8d315b14bb26ef8e6db674a4eaf.zip
Merge branch 'opp/linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm.git
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/lima/lima_devfreq.c12
-rw-r--r--drivers/gpu/drm/msm/adreno/a5xx_gpu.c8
-rw-r--r--drivers/gpu/drm/msm/adreno/a6xx_gpu.c10
-rw-r--r--drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c6
-rw-r--r--drivers/gpu/drm/msm/dp/dp_ctrl.c6
-rw-r--r--drivers/gpu/drm/msm/dsi/dsi_host.c6
-rw-r--r--drivers/gpu/drm/panfrost/panfrost_devfreq.c9
-rw-r--r--drivers/gpu/drm/tegra/gr3d.c6
8 files changed, 44 insertions, 19 deletions
diff --git a/drivers/gpu/drm/lima/lima_devfreq.c b/drivers/gpu/drm/lima/lima_devfreq.c
index 8989e215dfc9..d8c67843fa1b 100644
--- a/drivers/gpu/drm/lima/lima_devfreq.c
+++ b/drivers/gpu/drm/lima/lima_devfreq.c
@@ -111,6 +111,12 @@ int lima_devfreq_init(struct lima_device *ldev)
struct dev_pm_opp *opp;
unsigned long cur_freq;
int ret;
+ struct dev_pm_opp_config config = {
+ .regulator_names = (const char *[]){ "mali" },
+ .regulator_count = 1,
+ .clk_names = (const char *[]){ "core" },
+ .clk_count = 1,
+ };
if (!device_property_present(dev, "operating-points-v2"))
/* Optional, continue without devfreq */
@@ -118,11 +124,7 @@ int lima_devfreq_init(struct lima_device *ldev)
spin_lock_init(&ldevfreq->lock);
- ret = devm_pm_opp_set_clkname(dev, "core");
- if (ret)
- return ret;
-
- ret = devm_pm_opp_set_regulators(dev, (const char *[]){ "mali" }, 1);
+ ret = devm_pm_opp_set_config(dev, &config);
if (ret) {
/* Continue if the optional regulator is missing */
if (ret != -ENODEV)
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index c424e9a37669..6ebb5a28c501 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
@@ -1723,10 +1723,14 @@ static void check_speed_bin(struct device *dev)
{
struct nvmem_cell *cell;
u32 val;
+ struct dev_pm_opp_config config = {
+ .supported_hw = &val,
+ .supported_hw_count = 1,
+ };
/*
* If the OPP table specifies a opp-supported-hw property then we have
- * to set something with dev_pm_opp_set_supported_hw() or the table
+ * to set something with dev_pm_opp_set_config() or the table
* doesn't get populated so pick an arbitrary value that should
* ensure the default frequencies are selected but not conflict with any
* actual bins
@@ -1748,7 +1752,7 @@ static void check_speed_bin(struct device *dev)
nvmem_cell_put(cell);
}
- devm_pm_opp_set_supported_hw(dev, &val, 1);
+ devm_pm_opp_set_config(dev, &config);
}
struct msm_gpu *a5xx_gpu_init(struct drm_device *dev)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index 42ed9a3c4905..82801311f7d4 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -1800,6 +1800,10 @@ static int a6xx_set_supported_hw(struct device *dev, struct adreno_rev rev)
u32 supp_hw = UINT_MAX;
u32 speedbin;
int ret;
+ struct dev_pm_opp_config config = {
+ .supported_hw = &supp_hw,
+ .supported_hw_count = 1,
+ };
ret = adreno_read_speedbin(dev, &speedbin);
/*
@@ -1818,11 +1822,7 @@ static int a6xx_set_supported_hw(struct device *dev, struct adreno_rev rev)
supp_hw = fuse_to_supp_hw(dev, rev, speedbin);
done:
- ret = devm_pm_opp_set_supported_hw(dev, &supp_hw, 1);
- if (ret)
- return ret;
-
- return 0;
+ return devm_pm_opp_set_config(dev, &config);
}
static const struct adreno_gpu_funcs funcs = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index e23e2552e802..36ca946284d2 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -1215,12 +1215,16 @@ static int dpu_kms_init(struct drm_device *ddev)
struct dev_pm_opp *opp;
int ret = 0;
unsigned long max_freq = ULONG_MAX;
+ struct dev_pm_opp_config config = {
+ .clk_names = (const char *[]){"core"},
+ .clk_count = 1,
+ };
dpu_kms = devm_kzalloc(&pdev->dev, sizeof(*dpu_kms), GFP_KERNEL);
if (!dpu_kms)
return -ENOMEM;
- ret = devm_pm_opp_set_clkname(dev, "core");
+ ret = devm_pm_opp_set_config(dev, &config);
if (ret)
return ret;
/* OPP table is optional */
diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c
index 703249384e7c..99540803563d 100644
--- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
+++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c
@@ -2039,6 +2039,10 @@ struct dp_ctrl *dp_ctrl_get(struct device *dev, struct dp_link *link,
{
struct dp_ctrl_private *ctrl;
int ret;
+ struct dev_pm_opp_config config = {
+ .clk_names = (const char *[]){"ctrl_link"},
+ .clk_count = 1,
+ };
if (!dev || !panel || !aux ||
!link || !catalog) {
@@ -2052,7 +2056,7 @@ struct dp_ctrl *dp_ctrl_get(struct device *dev, struct dp_link *link,
return ERR_PTR(-ENOMEM);
}
- ret = devm_pm_opp_set_clkname(dev, "ctrl_link");
+ ret = devm_pm_opp_set_config(dev, &config);
if (ret) {
dev_err(dev, "invalid DP OPP table in device tree\n");
/* caller do PTR_ERR(opp_table) */
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
index a95d5df52653..c360a19dd5ba 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -2034,6 +2034,10 @@ int msm_dsi_host_init(struct msm_dsi *msm_dsi)
struct msm_dsi_host *msm_host = NULL;
struct platform_device *pdev = msm_dsi->pdev;
int ret;
+ struct dev_pm_opp_config config = {
+ .clk_names = (const char *[]){"byte"},
+ .clk_count = 1,
+ };
msm_host = devm_kzalloc(&pdev->dev, sizeof(*msm_host), GFP_KERNEL);
if (!msm_host) {
@@ -2095,7 +2099,7 @@ int msm_dsi_host_init(struct msm_dsi *msm_dsi)
goto fail;
}
- ret = devm_pm_opp_set_clkname(&pdev->dev, "byte");
+ ret = devm_pm_opp_set_config(&pdev->dev, &config);
if (ret)
return ret;
/* OPP table is optional */
diff --git a/drivers/gpu/drm/panfrost/panfrost_devfreq.c b/drivers/gpu/drm/panfrost/panfrost_devfreq.c
index 194af7f607a6..7826d9366d35 100644
--- a/drivers/gpu/drm/panfrost/panfrost_devfreq.c
+++ b/drivers/gpu/drm/panfrost/panfrost_devfreq.c
@@ -91,6 +91,10 @@ int panfrost_devfreq_init(struct panfrost_device *pfdev)
struct devfreq *devfreq;
struct thermal_cooling_device *cooling;
struct panfrost_devfreq *pfdevfreq = &pfdev->pfdevfreq;
+ struct dev_pm_opp_config config = {
+ .regulator_names = pfdev->comp->supply_names,
+ .regulator_count = pfdev->comp->num_supplies,
+ };
if (pfdev->comp->num_supplies > 1) {
/*
@@ -101,13 +105,12 @@ int panfrost_devfreq_init(struct panfrost_device *pfdev)
return 0;
}
- ret = devm_pm_opp_set_regulators(dev, pfdev->comp->supply_names,
- pfdev->comp->num_supplies);
+ ret = devm_pm_opp_set_config(dev, &config);
if (ret) {
/* Continue if the optional regulator is missing */
if (ret != -ENODEV) {
if (ret != -EPROBE_DEFER)
- DRM_DEV_ERROR(dev, "Couldn't set OPP regulators\n");
+ DRM_DEV_ERROR(dev, "Couldn't set OPP config\n");
return ret;
}
}
diff --git a/drivers/gpu/drm/tegra/gr3d.c b/drivers/gpu/drm/tegra/gr3d.c
index a1fd3113ea96..05c45c104e13 100644
--- a/drivers/gpu/drm/tegra/gr3d.c
+++ b/drivers/gpu/drm/tegra/gr3d.c
@@ -389,6 +389,10 @@ static int gr3d_init_power(struct device *dev, struct gr3d *gr3d)
struct device_link *link;
unsigned int i;
int err;
+ struct dev_pm_opp_config config = {
+ .genpd_names = opp_genpd_names,
+ .virt_devs = &opp_virt_devs,
+ };
err = of_count_phandle_with_args(dev->of_node, "power-domains",
"#power-domain-cells");
@@ -421,7 +425,7 @@ static int gr3d_init_power(struct device *dev, struct gr3d *gr3d)
if (dev->pm_domain)
return 0;
- err = devm_pm_opp_attach_genpd(dev, opp_genpd_names, &opp_virt_devs);
+ err = devm_pm_opp_set_config(dev, &config);
if (err)
return err;