From fbf0274e43b7e17ee740fee2d693932be093d56d Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Sat, 11 Nov 2006 17:24:55 +1100 Subject: [POWERPC] Support for DCR based MPIC This patch implements support for DCR based MPIC implementations. Such implementations have the MPIC_USES_DCR flag set and don't use the phys_addr argument of mpic_alloc (they require a valid dcr mapping in the device node) This version of the patch can use a little bif of cleanup still (I can probably consolidate rb->dbase/doff, at least once I'm sure on how the hardware is actually supposed to work vs. possible simulator issues) and it should be possible to build a DCR-only version of the driver. I need to cleanup a bit the CONFIG_* handling for that and probably introduce CONFIG_MPIC_MMIO and CONFIG_MPIC_DCR. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Paul Mackerras --- include/asm-powerpc/mpic.h | 35 +++++++++++++++++++++++++++++++---- 1 file changed, 31 insertions(+), 4 deletions(-) (limited to 'include/asm-powerpc/mpic.h') diff --git a/include/asm-powerpc/mpic.h b/include/asm-powerpc/mpic.h index ef0a5458d2b2..ad989d182fb4 100644 --- a/include/asm-powerpc/mpic.h +++ b/include/asm-powerpc/mpic.h @@ -3,6 +3,7 @@ #ifdef __KERNEL__ #include +#include /* * Global registers @@ -225,6 +226,23 @@ struct mpic_irq_fixup #endif /* CONFIG_MPIC_BROKEN_U3 */ +enum mpic_reg_type { + mpic_access_mmio_le, + mpic_access_mmio_be, +#ifdef CONFIG_PPC_DCR + mpic_access_dcr +#endif +}; + +struct mpic_reg_bank { + u32 __iomem *base; +#ifdef CONFIG_PPC_DCR + dcr_host_t dhost; + unsigned int dbase; + unsigned int doff; +#endif /* CONFIG_PPC_DCR */ +}; + /* The instance data of a given MPIC */ struct mpic { @@ -264,11 +282,18 @@ struct mpic spinlock_t fixup_lock; #endif + /* Register access method */ + enum mpic_reg_type reg_type; + /* The various ioremap'ed bases */ - volatile u32 __iomem *gregs; - volatile u32 __iomem *tmregs; - volatile u32 __iomem *cpuregs[MPIC_MAX_CPUS]; - volatile u32 __iomem *isus[MPIC_MAX_ISU]; + struct mpic_reg_bank gregs; + struct mpic_reg_bank tmregs; + struct mpic_reg_bank cpuregs[MPIC_MAX_CPUS]; + struct mpic_reg_bank isus[MPIC_MAX_ISU]; + +#ifdef CONFIG_PPC_DCR + unsigned int dcr_base; +#endif #ifdef CONFIG_MPIC_WEIRD /* Pointer to HW info array */ @@ -305,6 +330,8 @@ struct mpic #define MPIC_SPV_EOI 0x00000020 /* No passthrough disable */ #define MPIC_NO_PTHROU_DIS 0x00000040 +/* DCR based MPIC */ +#define MPIC_USES_DCR 0x00000080 /* MPIC HW modification ID */ #define MPIC_REGSET_MASK 0xf0000000 -- cgit v1.2.3 From a959ff56bbf07954ea4fa1cf72f99a38795eadb3 Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Sat, 11 Nov 2006 17:24:56 +1100 Subject: [POWERPC] Improve MPIC driver auto-configuration from DT This patch applies on top of the MPIC DCR support. It makes the MPIC driver capable of a lot more auto-configuration based on the device-tree, for example, it can retreive it's own physical address if not passed as an argument, find out if it's DCR or MMIO mapped, and set the BIG_ENDIAN flag automatically in the presence of a "big-endian" property in the device-tree node. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Paul Mackerras --- arch/powerpc/sysdev/mpic.c | 50 ++++++++++++++++++++++++++++++++++------------ include/asm-powerpc/mpic.h | 4 ++-- 2 files changed, 39 insertions(+), 15 deletions(-) (limited to 'include/asm-powerpc/mpic.h') diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index 909306ca04f4..411480d5c626 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c @@ -894,7 +894,7 @@ static struct irq_host_ops mpic_host_ops = { */ struct mpic * __init mpic_alloc(struct device_node *node, - unsigned long phys_addr, + phys_addr_t phys_addr, unsigned int flags, unsigned int isu_size, unsigned int irq_count, @@ -904,6 +904,7 @@ struct mpic * __init mpic_alloc(struct device_node *node, u32 reg; const char *vers; int i; + u64 paddr = phys_addr; mpic = alloc_bootmem(sizeof(struct mpic)); if (mpic == NULL) @@ -943,6 +944,11 @@ struct mpic * __init mpic_alloc(struct device_node *node, mpic->irq_count = irq_count; mpic->num_sources = 0; /* so far */ + /* Check for "big-endian" in device-tree */ + if (node && get_property(node, "big-endian", NULL) != NULL) + mpic->flags |= MPIC_BIG_ENDIAN; + + #ifdef CONFIG_MPIC_WEIRD mpic->hw_set = mpic_infos[MPIC_GET_REGSET(flags)]; #endif @@ -951,11 +957,17 @@ struct mpic * __init mpic_alloc(struct device_node *node, mpic->reg_type = (flags & MPIC_BIG_ENDIAN) ? mpic_access_mmio_be : mpic_access_mmio_le; + /* If no physical address is passed in, a device-node is mandatory */ + BUG_ON(paddr == 0 && node == NULL); + + /* If no physical address passed in, check if it's dcr based */ + if (paddr == 0 && get_property(node, "dcr-reg", NULL) != NULL) + mpic->flags |= MPIC_USES_DCR; + #ifdef CONFIG_PPC_DCR if (mpic->flags & MPIC_USES_DCR) { const u32 *dbasep; - BUG_ON(mpic->of_node == NULL); - dbasep = get_property(mpic->of_node, "dcr-reg", NULL); + dbasep = get_property(node, "dcr-reg", NULL); BUG_ON(dbasep == NULL); mpic->dcr_base = *dbasep; mpic->reg_type = mpic_access_dcr; @@ -964,9 +976,20 @@ struct mpic * __init mpic_alloc(struct device_node *node, BUG_ON (mpic->flags & MPIC_USES_DCR); #endif /* CONFIG_PPC_DCR */ + /* If the MPIC is not DCR based, and no physical address was passed + * in, try to obtain one + */ + if (paddr == 0 && !(mpic->flags & MPIC_USES_DCR)) { + const u32 *reg; + reg = get_property(node, "reg", NULL); + BUG_ON(reg == NULL); + paddr = of_translate_address(node, reg); + BUG_ON(paddr == OF_BAD_ADDR); + } + /* Map the global registers */ - mpic_map(mpic, phys_addr, &mpic->gregs, MPIC_INFO(GREG_BASE), 0x1000); - mpic_map(mpic, phys_addr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000); + mpic_map(mpic, paddr, &mpic->gregs, MPIC_INFO(GREG_BASE), 0x1000); + mpic_map(mpic, paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000); /* Reset */ if (flags & MPIC_WANTS_RESET) { @@ -991,7 +1014,7 @@ struct mpic * __init mpic_alloc(struct device_node *node, /* Map the per-CPU registers */ for (i = 0; i < mpic->num_cpus; i++) { - mpic_map(mpic, phys_addr, &mpic->cpuregs[i], + mpic_map(mpic, paddr, &mpic->cpuregs[i], MPIC_INFO(CPU_BASE) + i * MPIC_INFO(CPU_STRIDE), 0x1000); } @@ -999,7 +1022,7 @@ struct mpic * __init mpic_alloc(struct device_node *node, /* Initialize main ISU if none provided */ if (mpic->isu_size == 0) { mpic->isu_size = mpic->num_sources; - mpic_map(mpic, phys_addr, &mpic->isus[0], + mpic_map(mpic, paddr, &mpic->isus[0], MPIC_INFO(IRQ_BASE), MPIC_INFO(IRQ_STRIDE) * mpic->isu_size); } mpic->isu_shift = 1 + __ilog2(mpic->isu_size - 1); @@ -1020,10 +1043,11 @@ struct mpic * __init mpic_alloc(struct device_node *node, vers = ""; break; } - printk(KERN_INFO "mpic: Setting up MPIC \"%s\" version %s at %lx, max %d CPUs\n", - name, vers, phys_addr, mpic->num_cpus); - printk(KERN_INFO "mpic: ISU size: %d, shift: %d, mask: %x\n", mpic->isu_size, - mpic->isu_shift, mpic->isu_mask); + printk(KERN_INFO "mpic: Setting up MPIC \"%s\" version %s at %llx," + " max %d CPUs\n", + name, vers, (unsigned long long)paddr, mpic->num_cpus); + printk(KERN_INFO "mpic: ISU size: %d, shift: %d, mask: %x\n", + mpic->isu_size, mpic->isu_shift, mpic->isu_mask); mpic->next = mpics; mpics = mpic; @@ -1037,13 +1061,13 @@ struct mpic * __init mpic_alloc(struct device_node *node, } void __init mpic_assign_isu(struct mpic *mpic, unsigned int isu_num, - unsigned long phys_addr) + phys_addr_t paddr) { unsigned int isu_first = isu_num * mpic->isu_size; BUG_ON(isu_num >= MPIC_MAX_ISU); - mpic_map(mpic, phys_addr, &mpic->isus[isu_num], 0, + mpic_map(mpic, paddr, &mpic->isus[isu_num], 0, MPIC_INFO(IRQ_STRIDE) * mpic->isu_size); if ((isu_first + mpic->isu_size) > mpic->num_sources) mpic->num_sources = isu_first + mpic->isu_size; diff --git a/include/asm-powerpc/mpic.h b/include/asm-powerpc/mpic.h index ad989d182fb4..b71e7b32a555 100644 --- a/include/asm-powerpc/mpic.h +++ b/include/asm-powerpc/mpic.h @@ -364,7 +364,7 @@ struct mpic * that is senses[0] correspond to linux irq "irq_offset". */ extern struct mpic *mpic_alloc(struct device_node *node, - unsigned long phys_addr, + phys_addr_t phys_addr, unsigned int flags, unsigned int isu_size, unsigned int irq_count, @@ -377,7 +377,7 @@ extern struct mpic *mpic_alloc(struct device_node *node, * @phys_addr: physical address of the ISU */ extern void mpic_assign_isu(struct mpic *mpic, unsigned int isu_num, - unsigned long phys_addr); + phys_addr_t phys_addr); /* Set default sense codes * -- cgit v1.2.3