From e0a9ddd5d9e1c66caefda825b3cea8ea9bd21bf0 Mon Sep 17 00:00:00 2001 From: RinHizakura Date: Sat, 25 Dec 2021 18:06:07 +0800 Subject: mtd: rawnand: nandsim: Replace overflow check with kzalloc to single kcalloc Instead of self-checking overflow and allocating an array of specific size by counting the total required space handy, we already have existed kernel API which responses for all these works. Signed-off-by: RinHizakura Reviewed-by: Richard Weinberger Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20211225100607.118932-1-s921975628@gmail.com --- drivers/mtd/nand/raw/nandsim.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) (limited to 'drivers/mtd') diff --git a/drivers/mtd/nand/raw/nandsim.c b/drivers/mtd/nand/raw/nandsim.c index 0750121ac371..3698fb430f81 100644 --- a/drivers/mtd/nand/raw/nandsim.c +++ b/drivers/mtd/nand/raw/nandsim.c @@ -979,15 +979,8 @@ static int ns_read_error(unsigned int page_no) static int ns_setup_wear_reporting(struct mtd_info *mtd) { - size_t mem; - wear_eb_count = div_u64(mtd->size, mtd->erasesize); - mem = wear_eb_count * sizeof(unsigned long); - if (mem / sizeof(unsigned long) != wear_eb_count) { - NS_ERR("Too many erase blocks for wear reporting\n"); - return -ENOMEM; - } - erase_block_wear = kzalloc(mem, GFP_KERNEL); + erase_block_wear = kcalloc(wear_eb_count, sizeof(unsigned long), GFP_KERNEL); if (!erase_block_wear) { NS_ERR("Too many erase blocks for wear reporting\n"); return -ENOMEM; -- cgit v1.2.3 From db52b445793d8e4ffe9b53ff749a55470b900984 Mon Sep 17 00:00:00 2001 From: RinHizakura Date: Sat, 25 Dec 2021 18:06:48 +0800 Subject: mtd: rawnand: nandsim: Merge repeat codes in ns_switch_state The moving block of codes is shared between both 'if' and 'else' condition, we can move it out to reduce the duplication. Signed-off-by: RinHizakura Reviewed-by: Richard Weinberger Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20211225100648.119011-1-s921975628@gmail.com --- drivers/mtd/nand/raw/nandsim.c | 19 ++++++------------- 1 file changed, 6 insertions(+), 13 deletions(-) (limited to 'drivers/mtd') diff --git a/drivers/mtd/nand/raw/nandsim.c b/drivers/mtd/nand/raw/nandsim.c index 3698fb430f81..2ef6bddf0ab9 100644 --- a/drivers/mtd/nand/raw/nandsim.c +++ b/drivers/mtd/nand/raw/nandsim.c @@ -1731,14 +1731,6 @@ static void ns_switch_state(struct nandsim *ns) "state: %s, nxstate: %s\n", ns_get_state_name(ns->state), ns_get_state_name(ns->nxstate)); - - /* See, whether we need to do some action */ - if ((ns->state & ACTION_MASK) && - ns_do_state_action(ns, ns->state) < 0) { - ns_switch_to_ready_state(ns, NS_STATUS_FAILED(ns)); - return; - } - } else { /* * We don't yet know which operation we perform. @@ -1755,12 +1747,13 @@ static void ns_switch_state(struct nandsim *ns) if (ns_find_operation(ns, 0)) return; + } - if ((ns->state & ACTION_MASK) && - ns_do_state_action(ns, ns->state) < 0) { - ns_switch_to_ready_state(ns, NS_STATUS_FAILED(ns)); - return; - } + /* See, whether we need to do some action */ + if ((ns->state & ACTION_MASK) && + ns_do_state_action(ns, ns->state) < 0) { + ns_switch_to_ready_state(ns, NS_STATUS_FAILED(ns)); + return; } /* For 16x devices column means the page offset in words */ -- cgit v1.2.3 From 109cf81fb573c1b685282a35e427e76f35870628 Mon Sep 17 00:00:00 2001 From: RinHizakura Date: Sat, 25 Dec 2021 18:07:13 +0800 Subject: mtd: rawnand: nandsim: Add NS_PAGE_BYTE_SHIFT macro to replace the repeat pattern The (ns->regs.column + ns->regs.off) pattern repeats a lot which represents the byte shift in next page to access. We can replace it with a macro to improve the readability. Signed-off-by: RinHizakura Reviewed-by: Richard Weinberger Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20211225100713.119089-1-s921975628@gmail.com --- drivers/mtd/nand/raw/nandsim.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) (limited to 'drivers/mtd') diff --git a/drivers/mtd/nand/raw/nandsim.c b/drivers/mtd/nand/raw/nandsim.c index 2ef6bddf0ab9..24beade95c7f 100644 --- a/drivers/mtd/nand/raw/nandsim.c +++ b/drivers/mtd/nand/raw/nandsim.c @@ -201,6 +201,9 @@ MODULE_PARM_DESC(bch, "Enable BCH ecc and set how many bits should " /* Calculate the OOB offset in flash RAM image by (row, column) address */ #define NS_RAW_OFFSET_OOB(ns) (NS_RAW_OFFSET(ns) + ns->geom.pgsz) +/* Calculate the byte shift in the next page to access */ +#define NS_PAGE_BYTE_SHIFT(ns) ((ns)->regs.column + (ns)->regs.off) + /* After a command is input, the simulator goes to one of the following states */ #define STATE_CMD_READ0 0x00000001 /* read data from the beginning of page */ #define STATE_CMD_READ1 0x00000002 /* read data from the second half of page */ @@ -1382,7 +1385,7 @@ static inline union ns_mem *NS_GET_PAGE(struct nandsim *ns) */ static inline u_char *NS_PAGE_BYTE_OFF(struct nandsim *ns) { - return NS_GET_PAGE(ns)->byte + ns->regs.column + ns->regs.off; + return NS_GET_PAGE(ns)->byte + NS_PAGE_BYTE_SHIFT(ns); } static int ns_do_read_error(struct nandsim *ns, int num) @@ -1408,7 +1411,7 @@ static void ns_do_bit_flips(struct nandsim *ns, int num) ns->buf.byte[pos / 8] ^= (1 << (pos % 8)); NS_WARN("read_page: flipping bit %d in page %d " "reading from %d ecc: corrected=%u failed=%u\n", - pos, ns->regs.row, ns->regs.column + ns->regs.off, + pos, ns->regs.row, NS_PAGE_BYTE_SHIFT(ns), nsmtd->ecc_stats.corrected, nsmtd->ecc_stats.failed); } } @@ -1430,7 +1433,7 @@ static void ns_read_page(struct nandsim *ns, int num) ssize_t tx; NS_DBG("read_page: page %d written, reading from %d\n", - ns->regs.row, ns->regs.column + ns->regs.off); + ns->regs.row, NS_PAGE_BYTE_SHIFT(ns)); if (ns_do_read_error(ns, num)) return; pos = (loff_t)NS_RAW_OFFSET(ns) + ns->regs.off; @@ -1451,7 +1454,7 @@ static void ns_read_page(struct nandsim *ns, int num) memset(ns->buf.byte, 0xFF, num); } else { NS_DBG("read_page: page %d allocated, reading from %d\n", - ns->regs.row, ns->regs.column + ns->regs.off); + ns->regs.row, NS_PAGE_BYTE_SHIFT(ns)); if (ns_do_read_error(ns, num)) return; memcpy(ns->buf.byte, NS_PAGE_BYTE_OFF(ns), num); @@ -1502,7 +1505,7 @@ static int ns_prog_page(struct nandsim *ns, int num) int all; NS_DBG("prog_page: writing page %d\n", ns->regs.row); - pg_off = ns->file_buf + ns->regs.column + ns->regs.off; + pg_off = ns->file_buf + NS_PAGE_BYTE_SHIFT(ns); off = (loff_t)NS_RAW_OFFSET(ns) + ns->regs.off; if (!test_bit(ns->regs.row, ns->pages_written)) { all = 1; @@ -1591,7 +1594,7 @@ static int ns_do_state_action(struct nandsim *ns, uint32_t action) NS_ERR("do_state_action: column number is too large\n"); break; } - num = ns->geom.pgszoob - ns->regs.off - ns->regs.column; + num = ns->geom.pgszoob - NS_PAGE_BYTE_SHIFT(ns); ns_read_page(ns, num); NS_DBG("do_state_action: (ACTION_CPY:) copy %d bytes to int buf, raw offset %d\n", @@ -1659,7 +1662,7 @@ static int ns_do_state_action(struct nandsim *ns, uint32_t action) return -1; } - num = ns->geom.pgszoob - ns->regs.off - ns->regs.column; + num = ns->geom.pgszoob - NS_PAGE_BYTE_SHIFT(ns); if (num != ns->regs.count) { NS_ERR("do_state_action: too few bytes were input (%d instead of %d)\n", ns->regs.count, num); @@ -1803,7 +1806,7 @@ static void ns_switch_state(struct nandsim *ns) switch (NS_STATE(ns->state)) { case STATE_DATAIN: case STATE_DATAOUT: - ns->regs.num = ns->geom.pgszoob - ns->regs.off - ns->regs.column; + ns->regs.num = ns->geom.pgszoob - NS_PAGE_BYTE_SHIFT(ns); break; case STATE_DATAOUT_ID: -- cgit v1.2.3 From 3e68f331c8c759c0daa31cc92c3449b23119a215 Mon Sep 17 00:00:00 2001 From: Jiasheng Jiang Date: Wed, 5 Jan 2022 00:26:58 +0800 Subject: mtd: onenand: Check for error irq For the possible failure of the platform_get_irq(), the returned irq could be error number and will finally cause the failure of the request_irq(). Consider that platform_get_irq() can now in certain cases return -EPROBE_DEFER, and the consequences of letting request_irq() effectively convert that into -EINVAL, even at probe time rather than later on. So it might be better to check just now. Fixes: 2c22120fbd01 ("MTD: OneNAND: interrupt based wait support") Signed-off-by: Jiasheng Jiang Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20220104162658.1988142-1-jiasheng@iscas.ac.cn --- drivers/mtd/nand/onenand/generic.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'drivers/mtd') diff --git a/drivers/mtd/nand/onenand/generic.c b/drivers/mtd/nand/onenand/generic.c index 8b6f4da5d720..a4b8b65fe15f 100644 --- a/drivers/mtd/nand/onenand/generic.c +++ b/drivers/mtd/nand/onenand/generic.c @@ -53,7 +53,12 @@ static int generic_onenand_probe(struct platform_device *pdev) } info->onenand.mmcontrol = pdata ? pdata->mmcontrol : NULL; - info->onenand.irq = platform_get_irq(pdev, 0); + + err = platform_get_irq(pdev, 0); + if (err < 0) + goto out_iounmap; + + info->onenand.irq = err; info->mtd.dev.parent = &pdev->dev; info->mtd.priv = &info->onenand; -- cgit v1.2.3 From dbfbe79dbb6339196d5a26eaed70c3a50d6d154a Mon Sep 17 00:00:00 2001 From: Tudor Ambarus Date: Thu, 6 Jan 2022 15:16:09 +0200 Subject: mtd: rawnand: Remove of_get_nand_on_flash_bbt() wrapper Remove the wrapper as it hides for no reason what we really want: find an of_property. Removing the wrapper makes the code easier to read. Signed-off-by: Tudor Ambarus Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20220106131610.225661-1-tudor.ambarus@microchip.com --- drivers/mtd/nand/raw/nand_base.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) (limited to 'drivers/mtd') diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c index e7b2ba016d8c..dd276df31ffe 100644 --- a/drivers/mtd/nand/raw/nand_base.c +++ b/drivers/mtd/nand/raw/nand_base.c @@ -5290,11 +5290,6 @@ static int of_get_nand_bus_width(struct device_node *np) } } -static bool of_get_nand_on_flash_bbt(struct device_node *np) -{ - return of_property_read_bool(np, "nand-on-flash-bbt"); -} - static int of_get_nand_secure_regions(struct nand_chip *chip) { struct device_node *dn = nand_get_flash_node(chip); @@ -5378,7 +5373,7 @@ static int rawnand_dt_init(struct nand_chip *chip) if (of_property_read_bool(dn, "nand-is-boot-medium")) chip->options |= NAND_IS_BOOT_MEDIUM; - if (of_get_nand_on_flash_bbt(dn)) + if (of_property_read_bool(dn, "nand-on-flash-bbt")) chip->bbt_options |= NAND_BBT_USE_FLASH; of_get_nand_ecc_user_config(nand); -- cgit v1.2.3 From 65a01be4f5286af4e0af83292377a5904df642d9 Mon Sep 17 00:00:00 2001 From: Tudor Ambarus Date: Thu, 6 Jan 2022 15:16:10 +0200 Subject: mtd: rawnand: Rework of_get_nand_bus_width() of_get_nand_bus_width() had a wrong behavior because: 1/ it ignored the -ENODATA and -EOVERFLOW return values of of_property_read_u32(). "nand-bus-width" without value was tolerated while it shouldn't have been according to the devicetree bindings. 2/ returned -EIO when the nand-bus-width was neither 8 nor 16, when it should have returned -EINVAL instead. 3/ returned the 8 or 16 bus-width integer, but it was never used it its caller. A simply return 0 on success is enough. Rework of_get_nand_bus_width() and address all the above. The execution is now stopped in case of errors. Signed-off-by: Tudor Ambarus Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20220106131610.225661-2-tudor.ambarus@microchip.com --- drivers/mtd/nand/raw/nand_base.c | 30 ++++++++++++++++++------------ 1 file changed, 18 insertions(+), 12 deletions(-) (limited to 'drivers/mtd') diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c index dd276df31ffe..3e4a525ac3ca 100644 --- a/drivers/mtd/nand/raw/nand_base.c +++ b/drivers/mtd/nand/raw/nand_base.c @@ -5274,20 +5274,24 @@ static void of_get_nand_ecc_legacy_user_config(struct nand_chip *chip) user_conf->placement = of_get_rawnand_ecc_placement_legacy(dn); } -static int of_get_nand_bus_width(struct device_node *np) +static int of_get_nand_bus_width(struct nand_chip *chip) { + struct device_node *dn = nand_get_flash_node(chip); u32 val; + int ret; - if (of_property_read_u32(np, "nand-bus-width", &val)) - return 8; + ret = of_property_read_u32(dn, "nand-bus-width", &val); + if (ret == -EINVAL) + /* Buswidth defaults to 8 if the property does not exist .*/ + return 0; + else if (ret) + return ret; - switch (val) { - case 8: - case 16: - return val; - default: - return -EIO; - } + if (val == 16) + chip->options |= NAND_BUSWIDTH_16; + else if (val != 8) + return -EINVAL; + return 0; } static int of_get_nand_secure_regions(struct nand_chip *chip) @@ -5363,12 +5367,14 @@ static int rawnand_dt_init(struct nand_chip *chip) { struct nand_device *nand = mtd_to_nanddev(nand_to_mtd(chip)); struct device_node *dn = nand_get_flash_node(chip); + int ret; if (!dn) return 0; - if (of_get_nand_bus_width(dn) == 16) - chip->options |= NAND_BUSWIDTH_16; + ret = of_get_nand_bus_width(chip); + if (ret) + return ret; if (of_property_read_bool(dn, "nand-is-boot-medium")) chip->options |= NAND_IS_BOOT_MEDIUM; -- cgit v1.2.3 From 9e37532b1820b4d86b17c74bf3d176d79c80974b Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Fri, 7 Jan 2022 10:46:06 -0800 Subject: mtd: rawnand: brcmnand: Assign soc as early as possible In order to key off the brcmnand_probe() code in subsequent changes depending upon ctrl->soc, assign that variable as early as possible, instead of much later when we have checked that it is non-NULL. Signed-off-by: Florian Fainelli Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20220107184614.2670254-2-f.fainelli@gmail.com --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'drivers/mtd') diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index f75929783b94..63080ae3aef1 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -2998,6 +2998,7 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc) dev_set_drvdata(dev, ctrl); ctrl->dev = dev; + ctrl->soc = soc; init_completion(&ctrl->done); init_completion(&ctrl->dma_done); @@ -3138,8 +3139,6 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc) * interesting ways */ if (soc) { - ctrl->soc = soc; - ret = devm_request_irq(dev, ctrl->irq, brcmnand_irq, 0, DRV_NAME, ctrl); -- cgit v1.2.3 From 25f97138f8c225dbf365b428a94d7b30a6daefb3 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Fri, 7 Jan 2022 10:46:07 -0800 Subject: mtd: rawnand: brcmnand: Allow SoC to provide I/O operations Allow a brcmnand_soc instance to provide a custom set of I/O operations which we will require when using this driver on a BCMA bus which is not directly memory mapped I/O. Update the nand_{read,write}_reg accordingly to use the SoC operations if provided. To minimize the penalty on other SoCs which do support standard MMIO accesses, we use a static key which is disabled by default and gets enabled if a soc implementation does provide I/O operations. Signed-off-by: Florian Fainelli Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20220107184614.2670254-3-f.fainelli@gmail.com --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 28 ++++++++++++++++++++++++++-- drivers/mtd/nand/raw/brcmnand/brcmnand.h | 29 +++++++++++++++++++++++++++++ 2 files changed, 55 insertions(+), 2 deletions(-) (limited to 'drivers/mtd') diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 63080ae3aef1..48d57b19c293 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include @@ -207,6 +208,8 @@ enum { struct brcmnand_host; +static DEFINE_STATIC_KEY_FALSE(brcmnand_soc_has_ops_key); + struct brcmnand_controller { struct device *dev; struct nand_controller controller; @@ -592,15 +595,25 @@ enum { INTFC_CTLR_READY = BIT(31), }; +static inline bool brcmnand_non_mmio_ops(struct brcmnand_controller *ctrl) +{ + return static_branch_unlikely(&brcmnand_soc_has_ops_key); +} + static inline u32 nand_readreg(struct brcmnand_controller *ctrl, u32 offs) { + if (brcmnand_non_mmio_ops(ctrl)) + return brcmnand_soc_read(ctrl->soc, offs); return brcmnand_readl(ctrl->nand_base + offs); } static inline void nand_writereg(struct brcmnand_controller *ctrl, u32 offs, u32 val) { - brcmnand_writel(val, ctrl->nand_base + offs); + if (brcmnand_non_mmio_ops(ctrl)) + brcmnand_soc_write(ctrl->soc, val, offs); + else + brcmnand_writel(val, ctrl->nand_base + offs); } static int brcmnand_revision_init(struct brcmnand_controller *ctrl) @@ -766,13 +779,18 @@ static inline void brcmnand_rmw_reg(struct brcmnand_controller *ctrl, static inline u32 brcmnand_read_fc(struct brcmnand_controller *ctrl, int word) { + if (brcmnand_non_mmio_ops(ctrl)) + return brcmnand_soc_read(ctrl->soc, BRCMNAND_NON_MMIO_FC_ADDR); return __raw_readl(ctrl->nand_fc + word * 4); } static inline void brcmnand_write_fc(struct brcmnand_controller *ctrl, int word, u32 val) { - __raw_writel(val, ctrl->nand_fc + word * 4); + if (brcmnand_non_mmio_ops(ctrl)) + brcmnand_soc_write(ctrl->soc, val, BRCMNAND_NON_MMIO_FC_ADDR); + else + __raw_writel(val, ctrl->nand_fc + word * 4); } static inline void edu_writel(struct brcmnand_controller *ctrl, @@ -3000,6 +3018,12 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc) ctrl->dev = dev; ctrl->soc = soc; + /* Enable the static key if the soc provides I/O operations indicating + * that a non-memory mapped IO access path must be used + */ + if (brcmnand_soc_has_ops(ctrl->soc)) + static_branch_enable(&brcmnand_soc_has_ops_key); + init_completion(&ctrl->done); init_completion(&ctrl->dma_done); init_completion(&ctrl->edu_done); diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.h b/drivers/mtd/nand/raw/brcmnand/brcmnand.h index eb498fbe505e..f1f93d85f50d 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.h +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.h @@ -11,12 +11,25 @@ struct platform_device; struct dev_pm_ops; +struct brcmnand_io_ops; + +/* Special register offset constant to intercept a non-MMIO access + * to the flash cache register space. This is intentionally large + * not to overlap with an existing offset. + */ +#define BRCMNAND_NON_MMIO_FC_ADDR 0xffffffff struct brcmnand_soc { bool (*ctlrdy_ack)(struct brcmnand_soc *soc); void (*ctlrdy_set_enabled)(struct brcmnand_soc *soc, bool en); void (*prepare_data_bus)(struct brcmnand_soc *soc, bool prepare, bool is_param); + const struct brcmnand_io_ops *ops; +}; + +struct brcmnand_io_ops { + u32 (*read_reg)(struct brcmnand_soc *soc, u32 offset); + void (*write_reg)(struct brcmnand_soc *soc, u32 val, u32 offset); }; static inline void brcmnand_soc_data_bus_prepare(struct brcmnand_soc *soc, @@ -58,6 +71,22 @@ static inline void brcmnand_writel(u32 val, void __iomem *addr) writel_relaxed(val, addr); } +static inline bool brcmnand_soc_has_ops(struct brcmnand_soc *soc) +{ + return soc && soc->ops && soc->ops->read_reg && soc->ops->write_reg; +} + +static inline u32 brcmnand_soc_read(struct brcmnand_soc *soc, u32 offset) +{ + return soc->ops->read_reg(soc, offset); +} + +static inline void brcmnand_soc_write(struct brcmnand_soc *soc, u32 val, + u32 offset) +{ + soc->ops->write_reg(soc, val, offset); +} + int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc); int brcmnand_remove(struct platform_device *pdev); -- cgit v1.2.3 From c0d08a1401bbd0b8f523b431220e4b44fc4ac631 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Fri, 7 Jan 2022 10:46:08 -0800 Subject: mtd: rawnand: brcmnand: Avoid pdev in brcmnand_init_cs() In preparation for encapsulating more of what the loop calling brcmnand_init_cs() does, avoid using platform_device when it is the device behind platform_device that we are using for printing errors. No functional changes introduced. Signed-off-by: Florian Fainelli Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20220107184614.2670254-4-f.fainelli@gmail.com --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'drivers/mtd') diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 48d57b19c293..b7b15ddf326f 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -2771,7 +2771,7 @@ static const struct nand_controller_ops brcmnand_controller_ops = { static int brcmnand_init_cs(struct brcmnand_host *host, struct device_node *dn) { struct brcmnand_controller *ctrl = host->ctrl; - struct platform_device *pdev = host->pdev; + struct device *dev = ctrl->dev; struct mtd_info *mtd; struct nand_chip *chip; int ret; @@ -2779,7 +2779,7 @@ static int brcmnand_init_cs(struct brcmnand_host *host, struct device_node *dn) ret = of_property_read_u32(dn, "reg", &host->cs); if (ret) { - dev_err(&pdev->dev, "can't get chip-select\n"); + dev_err(dev, "can't get chip-select\n"); return -ENXIO; } @@ -2788,13 +2788,13 @@ static int brcmnand_init_cs(struct brcmnand_host *host, struct device_node *dn) nand_set_flash_node(chip, dn); nand_set_controller_data(chip, host); - mtd->name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "brcmnand.%d", + mtd->name = devm_kasprintf(dev, GFP_KERNEL, "brcmnand.%d", host->cs); if (!mtd->name) return -ENOMEM; mtd->owner = THIS_MODULE; - mtd->dev.parent = &pdev->dev; + mtd->dev.parent = dev; chip->legacy.cmd_ctrl = brcmnand_cmd_ctrl; chip->legacy.cmdfunc = brcmnand_cmdfunc; -- cgit v1.2.3 From 75ac944722b09faaffeb10bae355f5a1fb676107 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Fri, 7 Jan 2022 10:46:09 -0800 Subject: mtd: rawnand: brcmnand: Move OF operations out of brcmnand_init_cs() In order to initialize a given chip select object for use by the brcmnand driver, move all of the Device Tree specific routines outside of brcmnand_init_cs() in order to make it usable in a platform data configuration which will be necessary for supporting BCMA chips. No functional changes introduced. Signed-off-by: Florian Fainelli Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20220107184614.2670254-5-f.fainelli@gmail.com --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) (limited to 'drivers/mtd') diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index b7b15ddf326f..40818c881f08 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -2768,7 +2768,7 @@ static const struct nand_controller_ops brcmnand_controller_ops = { .attach_chip = brcmnand_attach_chip, }; -static int brcmnand_init_cs(struct brcmnand_host *host, struct device_node *dn) +static int brcmnand_init_cs(struct brcmnand_host *host) { struct brcmnand_controller *ctrl = host->ctrl; struct device *dev = ctrl->dev; @@ -2777,16 +2777,9 @@ static int brcmnand_init_cs(struct brcmnand_host *host, struct device_node *dn) int ret; u16 cfg_offs; - ret = of_property_read_u32(dn, "reg", &host->cs); - if (ret) { - dev_err(dev, "can't get chip-select\n"); - return -ENXIO; - } - mtd = nand_to_mtd(&host->chip); chip = &host->chip; - nand_set_flash_node(chip, dn); nand_set_controller_data(chip, host); mtd->name = devm_kasprintf(dev, GFP_KERNEL, "brcmnand.%d", host->cs); @@ -3193,7 +3186,16 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc) host->pdev = pdev; host->ctrl = ctrl; - ret = brcmnand_init_cs(host, child); + ret = of_property_read_u32(child, "reg", &host->cs); + if (ret) { + dev_err(dev, "can't get chip-select\n"); + devm_kfree(dev, host); + continue; + } + + nand_set_flash_node(&host->chip, child); + + ret = brcmnand_init_cs(host); if (ret) { devm_kfree(dev, host); continue; /* Try all chip-selects */ -- cgit v1.2.3 From f5619f3774d0ef6ddbb8de4c782cc4e42966c524 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Fri, 7 Jan 2022 10:46:10 -0800 Subject: mtd: rawnand: brcmnand: Allow working without interrupts The BCMA devices include the brcmnand controller but they do not wire up any interrupt line, allow the main interrupt to be optional and update the completion path to also check for the lack of an interrupt line. Signed-off-by: Florian Fainelli Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20220107184614.2670254-6-f.fainelli@gmail.com --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 52 +++++++++++++++----------------- 1 file changed, 24 insertions(+), 28 deletions(-) (limited to 'drivers/mtd') diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 40818c881f08..08e2acde5133 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -216,7 +216,7 @@ struct brcmnand_controller { void __iomem *nand_base; void __iomem *nand_fc; /* flash cache */ void __iomem *flash_dma_base; - unsigned int irq; + int irq; unsigned int dma_irq; int nand_version; @@ -1610,7 +1610,7 @@ static bool brcmstb_nand_wait_for_completion(struct nand_chip *chip) bool err = false; int sts; - if (mtd->oops_panic_write) { + if (mtd->oops_panic_write || ctrl->irq < 0) { /* switch to interrupt polling and PIO mode */ disable_ctrl_irqs(ctrl); sts = bcmnand_ctrl_poll_status(ctrl, NAND_CTRL_RDY, @@ -3144,33 +3144,29 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc) } /* IRQ */ - ctrl->irq = platform_get_irq(pdev, 0); - if ((int)ctrl->irq < 0) { - dev_err(dev, "no IRQ defined\n"); - ret = -ENODEV; - goto err; - } - - /* - * Some SoCs integrate this controller (e.g., its interrupt bits) in - * interesting ways - */ - if (soc) { - ret = devm_request_irq(dev, ctrl->irq, brcmnand_irq, 0, - DRV_NAME, ctrl); + ctrl->irq = platform_get_irq_optional(pdev, 0); + if (ctrl->irq > 0) { + /* + * Some SoCs integrate this controller (e.g., its interrupt bits) in + * interesting ways + */ + if (soc) { + ret = devm_request_irq(dev, ctrl->irq, brcmnand_irq, 0, + DRV_NAME, ctrl); - /* Enable interrupt */ - ctrl->soc->ctlrdy_ack(ctrl->soc); - ctrl->soc->ctlrdy_set_enabled(ctrl->soc, true); - } else { - /* Use standard interrupt infrastructure */ - ret = devm_request_irq(dev, ctrl->irq, brcmnand_ctlrdy_irq, 0, - DRV_NAME, ctrl); - } - if (ret < 0) { - dev_err(dev, "can't allocate IRQ %d: error %d\n", - ctrl->irq, ret); - goto err; + /* Enable interrupt */ + ctrl->soc->ctlrdy_ack(ctrl->soc); + ctrl->soc->ctlrdy_set_enabled(ctrl->soc, true); + } else { + /* Use standard interrupt infrastructure */ + ret = devm_request_irq(dev, ctrl->irq, brcmnand_ctlrdy_irq, 0, + DRV_NAME, ctrl); + } + if (ret < 0) { + dev_err(dev, "can't allocate IRQ %d: error %d\n", + ctrl->irq, ret); + goto err; + } } for_each_available_child_of_node(dn, child) { -- cgit v1.2.3 From 8e5913005f7bfcebd1c67df63fb63bcbb3bfc302 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Fri, 7 Jan 2022 10:46:12 -0800 Subject: mtd: rawnand: brcmnand: Allow platform data instantation Make use of the recently refactored code in brcmnand_init_cs() and derive the chip-select from the platform data that is supplied. Update the various code paths to avoid relying on possibly non-existent resources, too. Signed-off-by: Florian Fainelli Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20220107184614.2670254-8-f.fainelli@gmail.com --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 45 +++++++++++++++++++++++++------- 1 file changed, 35 insertions(+), 10 deletions(-) (limited to 'drivers/mtd') diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 08e2acde5133..eab19df152f3 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -2768,7 +2769,8 @@ static const struct nand_controller_ops brcmnand_controller_ops = { .attach_chip = brcmnand_attach_chip, }; -static int brcmnand_init_cs(struct brcmnand_host *host) +static int brcmnand_init_cs(struct brcmnand_host *host, + const char * const *part_probe_types) { struct brcmnand_controller *ctrl = host->ctrl; struct device *dev = ctrl->dev; @@ -2821,7 +2823,7 @@ static int brcmnand_init_cs(struct brcmnand_host *host) if (ret) return ret; - ret = mtd_device_register(mtd, NULL, 0); + ret = mtd_device_parse_register(mtd, part_probe_types, NULL, NULL, 0); if (ret) nand_cleanup(chip); @@ -2990,17 +2992,15 @@ static int brcmnand_edu_setup(struct platform_device *pdev) int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc) { + struct brcmnand_platform_data *pd = dev_get_platdata(&pdev->dev); struct device *dev = &pdev->dev; struct device_node *dn = dev->of_node, *child; struct brcmnand_controller *ctrl; + struct brcmnand_host *host; struct resource *res; int ret; - /* We only support device-tree instantiation */ - if (!dn) - return -ENODEV; - - if (!of_match_node(brcmnand_of_match, dn)) + if (dn && !of_match_node(brcmnand_of_match, dn)) return -ENODEV; ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL); @@ -3027,7 +3027,7 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc) /* NAND register range */ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ctrl->nand_base = devm_ioremap_resource(dev, res); - if (IS_ERR(ctrl->nand_base)) + if (IS_ERR(ctrl->nand_base) && !brcmnand_soc_has_ops(soc)) return PTR_ERR(ctrl->nand_base); /* Enable clock before using NAND registers */ @@ -3171,7 +3171,6 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc) for_each_available_child_of_node(dn, child) { if (of_device_is_compatible(child, "brcm,nandcs")) { - struct brcmnand_host *host; host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL); if (!host) { @@ -3191,7 +3190,7 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc) nand_set_flash_node(&host->chip, child); - ret = brcmnand_init_cs(host); + ret = brcmnand_init_cs(host, NULL); if (ret) { devm_kfree(dev, host); continue; /* Try all chip-selects */ @@ -3201,6 +3200,32 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc) } } + if (!list_empty(&ctrl->host_list)) + return 0; + + if (!pd) { + ret = -ENODEV; + goto err; + } + + /* If we got there we must have been probing via platform data */ + host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL); + if (!host) { + ret = -ENOMEM; + goto err; + } + host->pdev = pdev; + host->ctrl = ctrl; + host->cs = pd->chip_select; + host->chip.ecc.size = pd->ecc_stepsize; + host->chip.ecc.strength = pd->ecc_strength; + + ret = brcmnand_init_cs(host, pd->part_probe_types); + if (ret) + goto err; + + list_add_tail(&host->node, &ctrl->host_list); + /* No chip-selects could initialize properly */ if (list_empty(&ctrl->host_list)) { ret = -ENODEV; -- cgit v1.2.3 From 5abd37f6e9d653b748a1acad7e0abcbe540e896a Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Fri, 7 Jan 2022 10:46:13 -0800 Subject: mtd: rawnand: brcmnand: BCMA controller uses command shift of 0 For some odd and unexplained reason the BCMA NAND controller, albeit revision 3.4 uses a command shift of 0 instead of 24 as it should be, quirk that. Signed-off-by: Florian Fainelli Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20220107184614.2670254-9-f.fainelli@gmail.com --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'drivers/mtd') diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index eab19df152f3..4759303ece7c 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -916,6 +916,12 @@ static void brcmnand_wr_corr_thresh(struct brcmnand_host *host, u8 val) static inline int brcmnand_cmd_shift(struct brcmnand_controller *ctrl) { + /* Kludge for the BCMA-based NAND controller which does not actually + * shift the command + */ + if (ctrl->nand_version == 0x0304 && brcmnand_non_mmio_ops(ctrl)) + return 0; + if (ctrl->nand_version < 0x0602) return 24; return 0; -- cgit v1.2.3 From feca4cc4765a67907a97bddfa94aa6901cbbce7d Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Fri, 7 Jan 2022 10:46:14 -0800 Subject: mtd: rawnand: brcmnand: Add BCMA shim Add a BCMA shim to allow us to register the brcmnand driver using the BCMA bus which provides indirect memory mapped access to SoC registers. There are a number of registers that need to be byte swapped because they are natively big endian, coming directly from the NAND chip, and there is no bus interface unlike the iProc or STB platforms that performs the byte swapping for us. Signed-off-by: Florian Fainelli Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20220107184614.2670254-10-f.fainelli@gmail.com --- drivers/mtd/nand/raw/Kconfig | 13 +++ drivers/mtd/nand/raw/brcmnand/Makefile | 2 + drivers/mtd/nand/raw/brcmnand/bcma_nand.c | 132 ++++++++++++++++++++++++++++++ drivers/mtd/nand/raw/brcmnand/brcmnand.c | 4 + 4 files changed, 151 insertions(+) create mode 100644 drivers/mtd/nand/raw/brcmnand/bcma_nand.c (limited to 'drivers/mtd') diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index 20408b7db540..99141b14b059 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -209,6 +209,19 @@ config MTD_NAND_BRCMNAND originally designed for Set-Top Box but is used on various BCM7xxx, BCM3xxx, BCM63xxx, iProc/Cygnus and more. +if MTD_NAND_BRCMNAND + +config MTD_NAND_BRCMNAND_BCMA + tristate "Broadcom BCMA NAND controller" + depends on BCMA_NFLASH + depends on BCMA + help + Enables the BRCMNAND controller over BCMA on BCM47186/BCM5358 SoCs. + The glue driver will take care of performing the low-level I/O + operations to interface the BRCMNAND controller over the BCMA bus. + +endif # MTD_NAND_BRCMNAND + config MTD_NAND_BCM47XXNFLASH tristate "BCM4706 BCMA NAND controller" depends on BCMA_NFLASH diff --git a/drivers/mtd/nand/raw/brcmnand/Makefile b/drivers/mtd/nand/raw/brcmnand/Makefile index 195b845e48b8..16dc7254200e 100644 --- a/drivers/mtd/nand/raw/brcmnand/Makefile +++ b/drivers/mtd/nand/raw/brcmnand/Makefile @@ -6,3 +6,5 @@ obj-$(CONFIG_MTD_NAND_BRCMNAND) += bcm63138_nand.o obj-$(CONFIG_MTD_NAND_BRCMNAND) += bcm6368_nand.o obj-$(CONFIG_MTD_NAND_BRCMNAND) += brcmstb_nand.o obj-$(CONFIG_MTD_NAND_BRCMNAND) += brcmnand.o + +obj-$(CONFIG_MTD_NAND_BRCMNAND_BCMA) += bcma_nand.o diff --git a/drivers/mtd/nand/raw/brcmnand/bcma_nand.c b/drivers/mtd/nand/raw/brcmnand/bcma_nand.c new file mode 100644 index 000000000000..d7c62988c452 --- /dev/null +++ b/drivers/mtd/nand/raw/brcmnand/bcma_nand.c @@ -0,0 +1,132 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright © 2021 Broadcom + */ +#include +#include +#include +#include +#include + +#include "brcmnand.h" + +struct brcmnand_bcma_soc { + struct brcmnand_soc soc; + struct bcma_drv_cc *cc; +}; + +static inline bool brcmnand_bcma_needs_swapping(u32 offset) +{ + switch (offset) { + case BCMA_CC_NAND_SPARE_RD0: + case BCMA_CC_NAND_SPARE_RD4: + case BCMA_CC_NAND_SPARE_RD8: + case BCMA_CC_NAND_SPARE_RD12: + case BCMA_CC_NAND_SPARE_WR0: + case BCMA_CC_NAND_SPARE_WR4: + case BCMA_CC_NAND_SPARE_WR8: + case BCMA_CC_NAND_SPARE_WR12: + case BCMA_CC_NAND_DEVID: + case BCMA_CC_NAND_DEVID_X: + case BCMA_CC_NAND_SPARE_RD16: + case BCMA_CC_NAND_SPARE_RD20: + case BCMA_CC_NAND_SPARE_RD24: + case BCMA_CC_NAND_SPARE_RD28: + return true; + } + + return false; +} + +static inline struct brcmnand_bcma_soc *to_bcma_soc(struct brcmnand_soc *soc) +{ + return container_of(soc, struct brcmnand_bcma_soc, soc); +} + +static u32 brcmnand_bcma_read_reg(struct brcmnand_soc *soc, u32 offset) +{ + struct brcmnand_bcma_soc *sc = to_bcma_soc(soc); + u32 val; + + /* Offset into the NAND block and deal with the flash cache separately */ + if (offset == BRCMNAND_NON_MMIO_FC_ADDR) + offset = BCMA_CC_NAND_CACHE_DATA; + else + offset += BCMA_CC_NAND_REVISION; + + val = bcma_cc_read32(sc->cc, offset); + + /* Swap if necessary */ + if (brcmnand_bcma_needs_swapping(offset)) + val = be32_to_cpu(val); + return val; +} + +static void brcmnand_bcma_write_reg(struct brcmnand_soc *soc, u32 val, + u32 offset) +{ + struct brcmnand_bcma_soc *sc = to_bcma_soc(soc); + + /* Offset into the NAND block */ + if (offset == BRCMNAND_NON_MMIO_FC_ADDR) + offset = BCMA_CC_NAND_CACHE_DATA; + else + offset += BCMA_CC_NAND_REVISION; + + /* Swap if necessary */ + if (brcmnand_bcma_needs_swapping(offset)) + val = cpu_to_be32(val); + + bcma_cc_write32(sc->cc, offset, val); +} + +static struct brcmnand_io_ops brcmnand_bcma_io_ops = { + .read_reg = brcmnand_bcma_read_reg, + .write_reg = brcmnand_bcma_write_reg, +}; + +static void brcmnand_bcma_prepare_data_bus(struct brcmnand_soc *soc, bool prepare, + bool is_param) +{ + struct brcmnand_bcma_soc *sc = to_bcma_soc(soc); + + /* Reset the cache address to ensure we are already accessing the + * beginning of a sub-page. + */ + bcma_cc_write32(sc->cc, BCMA_CC_NAND_CACHE_ADDR, 0); +} + +static int brcmnand_bcma_nand_probe(struct platform_device *pdev) +{ + struct bcma_nflash *nflash = dev_get_platdata(&pdev->dev); + struct brcmnand_bcma_soc *soc; + + soc = devm_kzalloc(&pdev->dev, sizeof(*soc), GFP_KERNEL); + if (!soc) + return -ENOMEM; + + soc->cc = container_of(nflash, struct bcma_drv_cc, nflash); + soc->soc.prepare_data_bus = brcmnand_bcma_prepare_data_bus; + soc->soc.ops = &brcmnand_bcma_io_ops; + + if (soc->cc->core->bus->chipinfo.id == BCMA_CHIP_ID_BCM4706) { + dev_err(&pdev->dev, "Use bcm47xxnflash for 4706!\n"); + return -ENODEV; + } + + return brcmnand_probe(pdev, &soc->soc); +} + +static struct platform_driver brcmnand_bcma_nand_driver = { + .probe = brcmnand_bcma_nand_probe, + .remove = brcmnand_remove, + .driver = { + .name = "bcma_brcmnand", + .pm = &brcmnand_pm_ops, + } +}; +module_platform_driver(brcmnand_bcma_nand_driver); + +MODULE_LICENSE("GPL v2"); +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("NAND controller driver glue for BCMA chips"); diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 4759303ece7c..c412f79b81db 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -598,7 +598,11 @@ enum { static inline bool brcmnand_non_mmio_ops(struct brcmnand_controller *ctrl) { +#if IS_ENABLED(CONFIG_MTD_NAND_BRCMNAND_BCMA) return static_branch_unlikely(&brcmnand_soc_has_ops_key); +#else + return false; +#endif } static inline u32 nand_readreg(struct brcmnand_controller *ctrl, u32 offs) -- cgit v1.2.3 From 2970bf5a32f079e1e9197411db4fe9faccb1503a Mon Sep 17 00:00:00 2001 From: Dario Binacchi Date: Tue, 18 Jan 2022 10:54:32 +0100 Subject: mtd: rawnand: gpmi: fix controller timings setting Set the controller registers according to the real clock rate. The controller registers configuration (setup, hold, timeout, ... cycles) depends on the clock rate of the GPMI. Using the real rate instead of the ideal one, avoids that this inaccuracy (required_rate - real_rate) affects the registers setting. This patch has been tested on two custom boards with i.MX28 and i.MX6 SOCs: - i.MX28: required rate 100MHz, real rate 99.3MHz - i.MX6 required rate 100MHz, real rate 99MHz Fixes: b1206122069a ("mtd: rawnand: gpmi: use core timings instead of an empirical derivation") Co-developed-by: Michael Trimarchi Signed-off-by: Michael Trimarchi Signed-off-by: Dario Binacchi Tested-by: Sascha Hauer Reviewed-by: Sascha Hauer Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20220118095434.35081-3-dario.binacchi@amarulasolutions.com --- drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'drivers/mtd') diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c index 1b64c5a5140d..73c3bf59b55e 100644 --- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c +++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c @@ -648,6 +648,7 @@ static void gpmi_nfc_compute_timings(struct gpmi_nand_data *this, const struct nand_sdr_timings *sdr) { struct gpmi_nfc_hardware_timing *hw = &this->hw; + struct resources *r = &this->resources; unsigned int dll_threshold_ps = this->devdata->max_chain_delay; unsigned int period_ps, reference_period_ps; unsigned int data_setup_cycles, data_hold_cycles, addr_setup_cycles; @@ -671,6 +672,8 @@ static void gpmi_nfc_compute_timings(struct gpmi_nand_data *this, wrn_dly_sel = BV_GPMI_CTRL1_WRN_DLY_SEL_NO_DELAY; } + hw->clk_rate = clk_round_rate(r->clock[0], hw->clk_rate); + /* SDR core timings are given in picoseconds */ period_ps = div_u64((u64)NSEC_PER_SEC * 1000, hw->clk_rate); -- cgit v1.2.3 From 15e27d197a7ea69b4643791ca2f8467fdd998359 Mon Sep 17 00:00:00 2001 From: Dario Binacchi Date: Tue, 18 Jan 2022 10:54:33 +0100 Subject: mtd: rawnand: gpmi: validate controller clock rate What to do when the real rate of the gpmi clock is not equal to the required one? The solutions proposed in [1] did not lead to a conclusion on how to validate the clock rate, so, inspired by the document [2], I consider the rate correct only if not lower or equal to the rate of the previous edo mode. In fact, in chapter 4.16.2 (NV-DDR) of the document [2], it is written that "If the host selects timing mode n, then its clock period shall be faster than the clock period of timing mode n-1 and slower than or equal to the clock period of timing mode n.". I thought that it could therefore also be used in this case, without therefore having to define the valid rate ranges empirically. For example, suppose that gpmi_nfc_compute_timings() is called to set edo mode 5 (100MHz) but the rate returned by clk_round_rate() is 80MHz (edo mode 4). In this case gpmi_nfc_compute_timings() will return error, and will be called again to set edo mode 4, which this time will be successful. [1] https://lore.kernel.org/r/20210702065350.209646-5-ebiggers@kernel.org [2] http://www.onfi.org/-/media/client/onfi/specs/onfi_3_0_gold.pdf?la=en Co-developed-by: Michael Trimarchi Signed-off-by: Michael Trimarchi Signed-off-by: Dario Binacchi Tested-by: Sascha Hauer Reviewed-by: Sascha Hauer Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20220118095434.35081-4-dario.binacchi@amarulasolutions.com --- drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c | 22 ++++++++++++++++++---- 1 file changed, 18 insertions(+), 4 deletions(-) (limited to 'drivers/mtd') diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c index 73c3bf59b55e..cf35f4206030 100644 --- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c +++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c @@ -644,8 +644,8 @@ err_out: * RDN_DELAY = ----------------------- {3} * RP */ -static void gpmi_nfc_compute_timings(struct gpmi_nand_data *this, - const struct nand_sdr_timings *sdr) +static int gpmi_nfc_compute_timings(struct gpmi_nand_data *this, + const struct nand_sdr_timings *sdr) { struct gpmi_nfc_hardware_timing *hw = &this->hw; struct resources *r = &this->resources; @@ -657,23 +657,33 @@ static void gpmi_nfc_compute_timings(struct gpmi_nand_data *this, int sample_delay_ps, sample_delay_factor; u16 busy_timeout_cycles; u8 wrn_dly_sel; + unsigned long clk_rate, min_rate; if (sdr->tRC_min >= 30000) { /* ONFI non-EDO modes [0-3] */ hw->clk_rate = 22000000; + min_rate = 0; wrn_dly_sel = BV_GPMI_CTRL1_WRN_DLY_SEL_4_TO_8NS; } else if (sdr->tRC_min >= 25000) { /* ONFI EDO mode 4 */ hw->clk_rate = 80000000; + min_rate = 22000000; wrn_dly_sel = BV_GPMI_CTRL1_WRN_DLY_SEL_NO_DELAY; } else { /* ONFI EDO mode 5 */ hw->clk_rate = 100000000; + min_rate = 80000000; wrn_dly_sel = BV_GPMI_CTRL1_WRN_DLY_SEL_NO_DELAY; } - hw->clk_rate = clk_round_rate(r->clock[0], hw->clk_rate); + clk_rate = clk_round_rate(r->clock[0], hw->clk_rate); + if (clk_rate <= min_rate) { + dev_err(this->dev, "clock setting: expected %ld, got %ld\n", + hw->clk_rate, clk_rate); + return -ENOTSUPP; + } + hw->clk_rate = clk_rate; /* SDR core timings are given in picoseconds */ period_ps = div_u64((u64)NSEC_PER_SEC * 1000, hw->clk_rate); @@ -714,6 +724,7 @@ static void gpmi_nfc_compute_timings(struct gpmi_nand_data *this, hw->ctrl1n |= BF_GPMI_CTRL1_RDN_DELAY(sample_delay_factor) | BM_GPMI_CTRL1_DLL_ENABLE | (use_half_period ? BM_GPMI_CTRL1_HALF_PERIOD : 0); + return 0; } static int gpmi_nfc_apply_timings(struct gpmi_nand_data *this) @@ -769,6 +780,7 @@ static int gpmi_setup_interface(struct nand_chip *chip, int chipnr, { struct gpmi_nand_data *this = nand_get_controller_data(chip); const struct nand_sdr_timings *sdr; + int ret; /* Retrieve required NAND timings */ sdr = nand_get_sdr_timings(conf); @@ -784,7 +796,9 @@ static int gpmi_setup_interface(struct nand_chip *chip, int chipnr, return 0; /* Do the actual derivation of the controller timings */ - gpmi_nfc_compute_timings(this, sdr); + ret = gpmi_nfc_compute_timings(this, sdr); + if (ret) + return ret; this->hw.must_apply_timings = true; -- cgit v1.2.3 From ac178a21754cf720b27e82965c2f11e71e9e5968 Mon Sep 17 00:00:00 2001 From: Dario Binacchi Date: Tue, 18 Jan 2022 10:54:34 +0100 Subject: mtd: rawnand: gpmi: support fast edo timings for mx28 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit In the i.MX28 manual (MCIMX28RM, Rev. 1, 2010) you can find an example (15.2.4 High-Speed NAND Timing) of how to configure the GPMI controller to manage High-Speed ​​NAND devices, so it was wrong to assume that only i.MX6 can achieve EDO timings. This patch has been tested on a 2048/64 byte NAND (Micron MT29F2G08ABAEAH4). Kernel mtd tests: - mtd_nandbiterrs - mtd_nandecctest - mtd_oobtest - mtd_pagetest - mtd_readtest - mtd_speedtest - mtd_stresstest - mtd_subpagetest - mtd_torturetest [cycles_count = 10000000] run without errors. Before this patch (mode 0): --------------------------- eraseblock write speed is 2098 KiB/s eraseblock read speed is 2680 KiB/s page write speed is 1689 KiB/s page read speed is 2522 KiB/s 2 page write speed is 1899 KiB/s 2 page read speed is 2579 KiB/s erase speed is 128000 KiB/s 2x multi-block erase speed is 73142 KiB/s 4x multi-block erase speed is 204800 KiB/s 8x multi-block erase speed is 256000 KiB/s 16x multi-block erase speed is 256000 KiB/s 32x multi-block erase speed is 256000 KiB/s 64x multi-block erase speed is 256000 KiB/s After this patch (mode 5): ------------------------- eraseblock write speed is 3390 KiB/s eraseblock read speed is 5688 KiB/s page write speed is 2680 KiB/s page read speed is 4876 KiB/s 2 page write speed is 2909 KiB/s 2 page read speed is 5224 KiB/s erase speed is 170666 KiB/s 2x multi-block erase speed is 204800 KiB/s 4x multi-block erase speed is 256000 KiB/s 8x multi-block erase speed is 256000 KiB/s 16x multi-block erase speed is 256000 KiB/s 32x multi-block erase speed is 256000 KiB/s 64x multi-block erase speed is 256000 KiB/s Co-developed-by: Michael Trimarchi Signed-off-by: Michael Trimarchi Signed-off-by: Dario Binacchi Tested-by: Sascha Hauer Reviewed-by: Sascha Hauer Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20220118095434.35081-5-dario.binacchi@amarulasolutions.com --- drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/mtd') diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c index cf35f4206030..d96899fa90b7 100644 --- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c +++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c @@ -787,8 +787,8 @@ static int gpmi_setup_interface(struct nand_chip *chip, int chipnr, if (IS_ERR(sdr)) return PTR_ERR(sdr); - /* Only MX6 GPMI controller can reach EDO timings */ - if (sdr->tRC_min <= 25000 && !GPMI_IS_MX6(this)) + /* Only MX28/MX6 GPMI controller can reach EDO timings */ + if (sdr->tRC_min <= 25000 && !GPMI_IS_MX28(this) && !GPMI_IS_MX6(this)) return -ENOTSUPP; /* Stop here if this call was just a check */ -- cgit v1.2.3 From 2212c19e51969213924ab538396b6c1e072c41f1 Mon Sep 17 00:00:00 2001 From: Colin Ian King Date: Tue, 21 Dec 2021 18:13:40 +0000 Subject: mtd: rawnand: omap_elm: remove redundant variable 'errors' The variable 'errors' is being used to sum the number of errors but it is never used afterwards. This can be considered a redundant set of operations and can be removed. Signed-off-by: Colin Ian King Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20211221181340.524639-1-colin.i.king@gmail.com --- drivers/mtd/nand/raw/omap_elm.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'drivers/mtd') diff --git a/drivers/mtd/nand/raw/omap_elm.c b/drivers/mtd/nand/raw/omap_elm.c index db105d9b560c..893e9979c4a2 100644 --- a/drivers/mtd/nand/raw/omap_elm.c +++ b/drivers/mtd/nand/raw/omap_elm.c @@ -282,7 +282,7 @@ static void elm_start_processing(struct elm_info *info, static void elm_error_correction(struct elm_info *info, struct elm_errorvec *err_vec) { - int i, j, errors = 0; + int i, j; int offset; u32 reg_val; @@ -312,8 +312,6 @@ static void elm_error_correction(struct elm_info *info, /* Update error location register */ offset += 4; } - - errors += err_vec[i].error_count; } else { err_vec[i].error_uncorrectable = true; } -- cgit v1.2.3 From d430e4acd99f3f2cd5fa30fa6e27dd39261cc967 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Tue, 25 Jan 2022 14:52:43 -0800 Subject: mtd: rawnand: brcmnand: Fix sparse warnings in bcma_nand sparse was unhappy about the way we woulc call cpu_to_be32/be32_to_cpu, apply the appropriate casting to silence the warnings. Reported-by: kernel test robot Link: https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org/thread/ZNHPJFYLO64EGI5QUT7HZ63J7O5J2G7N/ Signed-off-by: Florian Fainelli Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20220125225243.15201-1-f.fainelli@gmail.com --- drivers/mtd/nand/raw/brcmnand/bcma_nand.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/mtd') diff --git a/drivers/mtd/nand/raw/brcmnand/bcma_nand.c b/drivers/mtd/nand/raw/brcmnand/bcma_nand.c index d7c62988c452..dd27977919fb 100644 --- a/drivers/mtd/nand/raw/brcmnand/bcma_nand.c +++ b/drivers/mtd/nand/raw/brcmnand/bcma_nand.c @@ -58,7 +58,7 @@ static u32 brcmnand_bcma_read_reg(struct brcmnand_soc *soc, u32 offset) /* Swap if necessary */ if (brcmnand_bcma_needs_swapping(offset)) - val = be32_to_cpu(val); + val = be32_to_cpu((__force __be32)val); return val; } @@ -75,7 +75,7 @@ static void brcmnand_bcma_write_reg(struct brcmnand_soc *soc, u32 val, /* Swap if necessary */ if (brcmnand_bcma_needs_swapping(offset)) - val = cpu_to_be32(val); + val = (__force u32)cpu_to_be32(val); bcma_cc_write32(sc->cc, offset, val); } -- cgit v1.2.3 From 8cba323437a49a45756d661f500b324fc2d486fe Mon Sep 17 00:00:00 2001 From: Sean Nyekjaer Date: Tue, 8 Feb 2022 09:52:13 +0100 Subject: mtd: rawnand: protect access to rawnand devices while in suspend Prevent rawnand access while in a suspended state. Commit 013e6292aaf5 ("mtd: rawnand: Simplify the locking") allows the rawnand layer to return errors rather than waiting in a blocking wait. Tested on a iMX6ULL. Fixes: 013e6292aaf5 ("mtd: rawnand: Simplify the locking") Signed-off-by: Sean Nyekjaer Reviewed-by: Boris Brezillon Cc: stable@vger.kernel.org Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20220208085213.1838273-1-sean@geanix.com --- drivers/mtd/nand/raw/nand_base.c | 44 ++++++++++++++++++---------------------- include/linux/mtd/rawnand.h | 2 ++ 2 files changed, 22 insertions(+), 24 deletions(-) (limited to 'drivers/mtd') diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c index 3e4a525ac3ca..612ae60e9763 100644 --- a/drivers/mtd/nand/raw/nand_base.c +++ b/drivers/mtd/nand/raw/nand_base.c @@ -338,16 +338,19 @@ static int nand_isbad_bbm(struct nand_chip *chip, loff_t ofs) * * Return: -EBUSY if the chip has been suspended, 0 otherwise */ -static int nand_get_device(struct nand_chip *chip) +static void nand_get_device(struct nand_chip *chip) { - mutex_lock(&chip->lock); - if (chip->suspended) { + /* Wait until the device is resumed. */ + while (1) { + mutex_lock(&chip->lock); + if (!chip->suspended) { + mutex_lock(&chip->controller->lock); + return; + } mutex_unlock(&chip->lock); - return -EBUSY; - } - mutex_lock(&chip->controller->lock); - return 0; + wait_event(chip->resume_wq, !chip->suspended); + } } /** @@ -576,9 +579,7 @@ static int nand_block_markbad_lowlevel(struct nand_chip *chip, loff_t ofs) nand_erase_nand(chip, &einfo, 0); /* Write bad block marker to OOB */ - ret = nand_get_device(chip); - if (ret) - return ret; + nand_get_device(chip); ret = nand_markbad_bbm(chip, ofs); nand_release_device(chip); @@ -3826,9 +3827,7 @@ static int nand_read_oob(struct mtd_info *mtd, loff_t from, ops->mode != MTD_OPS_RAW) return -ENOTSUPP; - ret = nand_get_device(chip); - if (ret) - return ret; + nand_get_device(chip); if (!ops->datbuf) ret = nand_do_read_oob(chip, from, ops); @@ -4415,13 +4414,11 @@ static int nand_write_oob(struct mtd_info *mtd, loff_t to, struct mtd_oob_ops *ops) { struct nand_chip *chip = mtd_to_nand(mtd); - int ret; + int ret = 0; ops->retlen = 0; - ret = nand_get_device(chip); - if (ret) - return ret; + nand_get_device(chip); switch (ops->mode) { case MTD_OPS_PLACE_OOB: @@ -4481,9 +4478,7 @@ int nand_erase_nand(struct nand_chip *chip, struct erase_info *instr, return -EIO; /* Grab the lock and see if the device is available */ - ret = nand_get_device(chip); - if (ret) - return ret; + nand_get_device(chip); /* Shift to get first page */ page = (int)(instr->addr >> chip->page_shift); @@ -4570,7 +4565,7 @@ static void nand_sync(struct mtd_info *mtd) pr_debug("%s: called\n", __func__); /* Grab the lock and see if the device is available */ - WARN_ON(nand_get_device(chip)); + nand_get_device(chip); /* Release it and go back */ nand_release_device(chip); } @@ -4587,9 +4582,7 @@ static int nand_block_isbad(struct mtd_info *mtd, loff_t offs) int ret; /* Select the NAND device */ - ret = nand_get_device(chip); - if (ret) - return ret; + nand_get_device(chip); nand_select_target(chip, chipnr); @@ -4660,6 +4653,8 @@ static void nand_resume(struct mtd_info *mtd) __func__); } mutex_unlock(&chip->lock); + + wake_up_all(&chip->resume_wq); } /** @@ -5438,6 +5433,7 @@ static int nand_scan_ident(struct nand_chip *chip, unsigned int maxchips, chip->cur_cs = -1; mutex_init(&chip->lock); + init_waitqueue_head(&chip->resume_wq); /* Enforce the right timings for reset/detection */ chip->current_interface_config = nand_get_reset_interface_config(); diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index 5b88cd51fadb..dcf90144d70b 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -1240,6 +1240,7 @@ struct nand_secure_region { * @lock: Lock protecting the suspended field. Also used to serialize accesses * to the NAND device * @suspended: Set to 1 when the device is suspended, 0 when it's not + * @resume_wq: wait queue to sleep if rawnand is in suspended state. * @cur_cs: Currently selected target. -1 means no target selected, otherwise we * should always have cur_cs >= 0 && cur_cs < nanddev_ntargets(). * NAND Controller drivers should not modify this value, but they're @@ -1294,6 +1295,7 @@ struct nand_chip { /* Internals */ struct mutex lock; unsigned int suspended : 1; + wait_queue_head_t resume_wq; int cur_cs; int read_retries; struct nand_secure_region *secure_regions; -- cgit v1.2.3 From a1fe2ace2c39dcdc7c053705459a73b7598b1e4f Mon Sep 17 00:00:00 2001 From: Amit Kumar Mahapatra Date: Wed, 9 Feb 2022 11:04:27 +0530 Subject: mtd: rawnand: pl353: Set the nand chip node as the flash node In devicetree the flash information is embedded within nand chip node, so during nand chip initialization the nand chip node should be passed to nand_set_flash_node() api, instead of nand controller node. Fixes: 08d8c62164a3 ("mtd: rawnand: pl353: Add support for the ARM PL353 SMC NAND controller") Signed-off-by: Amit Kumar Mahapatra Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20220209053427.27676-1-amit.kumar-mahapatra@xilinx.com --- drivers/mtd/nand/raw/pl35x-nand-controller.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/mtd') diff --git a/drivers/mtd/nand/raw/pl35x-nand-controller.c b/drivers/mtd/nand/raw/pl35x-nand-controller.c index 8a91e069ee2e..3c6f6aff649f 100644 --- a/drivers/mtd/nand/raw/pl35x-nand-controller.c +++ b/drivers/mtd/nand/raw/pl35x-nand-controller.c @@ -1062,7 +1062,7 @@ static int pl35x_nand_chip_init(struct pl35x_nandc *nfc, chip->controller = &nfc->controller; mtd = nand_to_mtd(chip); mtd->dev.parent = nfc->dev; - nand_set_flash_node(chip, nfc->dev->of_node); + nand_set_flash_node(chip, np); if (!mtd->name) { mtd->name = devm_kasprintf(nfc->dev, GFP_KERNEL, "%s", PL35X_NANDC_DRIVER_NAME); -- cgit v1.2.3 From ffb16c1c42670356c579926aabdac0ac7bbc16d8 Mon Sep 17 00:00:00 2001 From: Christophe Kerello Date: Thu, 17 Feb 2022 15:47:53 +0100 Subject: mtd: rawnand: stm32_fmc2: Add NAND Write Protect support This patch adds the support of the WP# signal. WP will be disabled in probe/resume callbacks and will be enabled in remove/suspend callbacks. Signed-off-by: Christophe Kerello Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20220217144755.270679-3-christophe.kerello@foss.st.com --- drivers/mtd/nand/raw/stm32_fmc2_nand.c | 40 +++++++++++++++++++++++++++++++++- 1 file changed, 39 insertions(+), 1 deletion(-) (limited to 'drivers/mtd') diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c index 97b4e02e43e4..87c1c7dd97eb 100644 --- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c +++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -231,6 +232,7 @@ struct stm32_fmc2_timings { struct stm32_fmc2_nand { struct nand_chip chip; + struct gpio_desc *wp_gpio; struct stm32_fmc2_timings timings; int ncs; int cs_used[FMC2_MAX_CE]; @@ -1747,6 +1749,18 @@ static const struct nand_controller_ops stm32_fmc2_nfc_controller_ops = { .setup_interface = stm32_fmc2_nfc_setup_interface, }; +static void stm32_fmc2_nfc_wp_enable(struct stm32_fmc2_nand *nand) +{ + if (nand->wp_gpio) + gpiod_set_value(nand->wp_gpio, 1); +} + +static void stm32_fmc2_nfc_wp_disable(struct stm32_fmc2_nand *nand) +{ + if (nand->wp_gpio) + gpiod_set_value(nand->wp_gpio, 0); +} + static int stm32_fmc2_nfc_parse_child(struct stm32_fmc2_nfc *nfc, struct device_node *dn) { @@ -1785,6 +1799,18 @@ static int stm32_fmc2_nfc_parse_child(struct stm32_fmc2_nfc *nfc, nand->cs_used[i] = cs; } + nand->wp_gpio = devm_gpiod_get_from_of_node(nfc->dev, dn, + "wp-gpios", 0, + GPIOD_OUT_HIGH, "wp"); + if (IS_ERR(nand->wp_gpio)) { + ret = PTR_ERR(nand->wp_gpio); + if (ret != -ENOENT) + return dev_err_probe(nfc->dev, ret, + "failed to request WP GPIO\n"); + + nand->wp_gpio = NULL; + } + nand_set_flash_node(&nand->chip, dn); return 0; @@ -1956,10 +1982,12 @@ static int stm32_fmc2_nfc_probe(struct platform_device *pdev) chip->options |= NAND_BUSWIDTH_AUTO | NAND_NO_SUBPAGE_WRITE | NAND_USES_DMA; + stm32_fmc2_nfc_wp_disable(nand); + /* Scan to find existence of the device */ ret = nand_scan(chip, nand->ncs); if (ret) - goto err_release_dma; + goto err_wp_enable; ret = mtd_device_register(mtd, NULL, 0); if (ret) @@ -1972,6 +2000,9 @@ static int stm32_fmc2_nfc_probe(struct platform_device *pdev) err_nand_cleanup: nand_cleanup(chip); +err_wp_enable: + stm32_fmc2_nfc_wp_enable(nand); + err_release_dma: if (nfc->dma_ecc_ch) dma_release_channel(nfc->dma_ecc_ch); @@ -2012,15 +2043,20 @@ static int stm32_fmc2_nfc_remove(struct platform_device *pdev) clk_disable_unprepare(nfc->clk); + stm32_fmc2_nfc_wp_enable(nand); + return 0; } static int __maybe_unused stm32_fmc2_nfc_suspend(struct device *dev) { struct stm32_fmc2_nfc *nfc = dev_get_drvdata(dev); + struct stm32_fmc2_nand *nand = &nfc->nand; clk_disable_unprepare(nfc->clk); + stm32_fmc2_nfc_wp_enable(nand); + pinctrl_pm_select_sleep_state(dev); return 0; @@ -2042,6 +2078,8 @@ static int __maybe_unused stm32_fmc2_nfc_resume(struct device *dev) stm32_fmc2_nfc_init(nfc); + stm32_fmc2_nfc_wp_disable(nand); + for (chip_cs = 0; chip_cs < FMC2_MAX_CE; chip_cs++) { if (!(nfc->cs_assigned & BIT(chip_cs))) continue; -- cgit v1.2.3 From fba6eb4fc4e6819d9684d378ace339c4212d5ce1 Mon Sep 17 00:00:00 2001 From: Yihao Han Date: Thu, 3 Mar 2022 04:34:27 -0800 Subject: mtd: rawnand: rockchip: fix platform_get_irq.cocci warning Remove dev_err() messages after platform_get_irq*() failures. platform_get_irq() already prints an error. Generated by: scripts/coccinelle/api/platform_get_irq.cocci Signed-off-by: Yihao Han Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20220303123431.3170-1-hanyihao@vivo.com --- drivers/mtd/nand/raw/rockchip-nand-controller.c | 1 - 1 file changed, 1 deletion(-) (limited to 'drivers/mtd') diff --git a/drivers/mtd/nand/raw/rockchip-nand-controller.c b/drivers/mtd/nand/raw/rockchip-nand-controller.c index b5405bc7ca3a..cbaa4f1c83da 100644 --- a/drivers/mtd/nand/raw/rockchip-nand-controller.c +++ b/drivers/mtd/nand/raw/rockchip-nand-controller.c @@ -1403,7 +1403,6 @@ static int rk_nfc_probe(struct platform_device *pdev) irq = platform_get_irq(pdev, 0); if (irq < 0) { - dev_err(dev, "no NFC irq resource\n"); ret = -EINVAL; goto clk_disable; } -- cgit v1.2.3 From fecbd4a317c95d73c849648c406bcf1b6a0ec1cf Mon Sep 17 00:00:00 2001 From: Xin Xiong Date: Fri, 4 Mar 2022 16:53:32 +0800 Subject: mtd: rawnand: atmel: fix refcount issue in atmel_nand_controller_init The reference counting issue happens in several error handling paths on a refcounted object "nc->dmac". In these paths, the function simply returns the error code, forgetting to balance the reference count of "nc->dmac", increased earlier by dma_request_channel(), which may cause refcount leaks. Fix it by decrementing the refcount of specific object in those error paths. Fixes: f88fc122cc34 ("mtd: nand: Cleanup/rework the atmel_nand driver") Co-developed-by: Xiyu Yang Signed-off-by: Xiyu Yang Co-developed-by: Xin Tan Signed-off-by: Xin Tan Signed-off-by: Xin Xiong Reviewed-by: Claudiu Beznea Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20220304085330.3610-1-xiongx18@fudan.edu.cn --- drivers/mtd/nand/raw/atmel/nand-controller.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) (limited to 'drivers/mtd') diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c index f3276ee9e4fe..ddd93bc38ea6 100644 --- a/drivers/mtd/nand/raw/atmel/nand-controller.c +++ b/drivers/mtd/nand/raw/atmel/nand-controller.c @@ -2060,13 +2060,15 @@ static int atmel_nand_controller_init(struct atmel_nand_controller *nc, nc->mck = of_clk_get(dev->parent->of_node, 0); if (IS_ERR(nc->mck)) { dev_err(dev, "Failed to retrieve MCK clk\n"); - return PTR_ERR(nc->mck); + ret = PTR_ERR(nc->mck); + goto out_release_dma; } np = of_parse_phandle(dev->parent->of_node, "atmel,smc", 0); if (!np) { dev_err(dev, "Missing or invalid atmel,smc property\n"); - return -EINVAL; + ret = -EINVAL; + goto out_release_dma; } nc->smc = syscon_node_to_regmap(np); @@ -2074,10 +2076,16 @@ static int atmel_nand_controller_init(struct atmel_nand_controller *nc, if (IS_ERR(nc->smc)) { ret = PTR_ERR(nc->smc); dev_err(dev, "Could not get SMC regmap (err = %d)\n", ret); - return ret; + goto out_release_dma; } return 0; + +out_release_dma: + if (nc->dmac) + dma_release_channel(nc->dmac); + + return ret; } static int -- cgit v1.2.3