From cd65dd4180df66f5b469e2a52caae3bfe38d5526 Mon Sep 17 00:00:00 2001 From: Alexandre Belloni Date: Thu, 5 Mar 2020 17:04:51 +0100 Subject: rtc: sirfsoc: set range This RTC is a 32bit counter running at 16Hz. This overflows every eight years and a half. However, the driver uses the SW_VALUE register to store the overflow, extending the counter to 64bit as long as the update happens before the overflow. Link: https://lore.kernel.org/r/20200305160452.27808-2-alexandre.belloni@bootlin.com Signed-off-by: Alexandre Belloni --- drivers/rtc/rtc-sirfsoc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/rtc/rtc-sirfsoc.c b/drivers/rtc/rtc-sirfsoc.c index b2e72597eee8..8b3c88fb9793 100644 --- a/drivers/rtc/rtc-sirfsoc.c +++ b/drivers/rtc/rtc-sirfsoc.c @@ -346,6 +346,7 @@ static int sirfsoc_rtc_probe(struct platform_device *pdev) return PTR_ERR(rtcdrv->rtc); rtcdrv->rtc->ops = &sirfsoc_rtc_ops; + rtcdrv->rtc->range_max = (1ULL << 60) - 1; rtcdrv->irq = platform_get_irq(pdev, 0); err = devm_request_irq(&pdev->dev, rtcdrv->irq, sirfsoc_rtc_irq_handler, -- cgit v1.2.3