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2022-05-05soc: qcom: pdr: use static for servreg_* variablesTom Rix
Sparse reports this repesentative issue pdr_internal.h:31:22: warning: symbol 'servreg_location_entry_ei' was not declared. Should it be static? Similar for other servreg_* Global variables should not be defined in header files. This only works because pdr_internal.h is only included by pdr_interface.c. Single file use variables should be static so add static to their storage-class specifiers. Signed-off-by: Tom Rix <trix@redhat.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220422173806.21982-1-trix@redhat.com
2022-05-04soc: qcom: llcc: Add sc8180x and sc8280xp configurationsBjorn Andersson
Add LLCC configuration data for the SC8180X and SC8280XP platforms, based on the downstream tables. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com> Link: https://lore.kernel.org/r/20220502215406.612967-3-bjorn.andersson@linaro.org
2022-04-28soc: qcom: rpmhpd: add sc8280xp & sa8540p rpmh power-domainsBjorn Andersson
The Qualcomm sc8280xp platform has 13 and the sa8540p platform has 11 power-domains. Add compatibles, the typically used ones power-domains and their relevant active-only variants, to the RPMh power-domain driver. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20220426233508.1762345-4-bjorn.andersson@linaro.org
2022-04-28soc: qcom: rpmhpd: Don't warn about sparse rpmhpd arraysBjorn Andersson
In some cases the DT binding will fully describe the set of available RPMh power-domains, but there is no reason for exposing them all in the implementation. Omitting individual data->domains is handle gracefully by of_genpd_add_provider_onecell(), so there's no reason for printing a warning when this occurs. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20220426233508.1762345-3-bjorn.andersson@linaro.org
2022-04-19soc: qcom: socinfo: Sort out 8974PRO namesLuca Weiss
MSM8974PRO is commonly used for referring to Snapdragon 801, compared to MSM8974 which is Snapdragon 800. The Snapdragon 801 has three variants with different clock speeds, with the -AA, -AB and -AC suffix. Adjust the names in socinfo to reflect this. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220415195449.617040-1-luca@z3ntu.xyz
2022-04-12soc: qcom: smem: validate fields of shared structuresDeepak Kumar Singh
Structures in shared memory that can be modified by remote processors may have untrusted values, they should be validated before use. Adding proper validation before using fields of shared structures. Signed-off-by: Deepak Kumar Singh <quic_deesin@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1646147913-15791-2-git-send-email-quic_deesin@quicinc.com
2022-04-12soc: qcom: smem: map only partitions used by local HOSTDeepak Kumar Singh
SMEM driver is IO mapping complete region and CPU is doing a speculative read into a partition where local HOST does not have permission resulting in a NOC error. Map only those partitions which are accessibly to local HOST. Signed-off-by: Deepak Kumar Singh <quic_deesin@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1646147913-15791-1-git-send-email-quic_deesin@quicinc.com
2022-04-11soc: qcom: llcc: Add MODULE_DEVICE_TABLE()Bjorn Andersson
The llcc-qcom driver can be compiled as a module, but lacks MODULE_DEVICE_TABLE() and will therefore not be loaded automatically. Fix this. Fixes: a3134fb09e0b ("drivers: soc: Add LLCC driver") Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220408213336.581661-3-bjorn.andersson@linaro.org
2022-04-07soc: qcom: pdr: replace usage of found with dedicated list iterator variableJakob Koschel
To move the list iterator variable into the list_for_each_entry_*() macro in the future it should be avoided to use the list iterator variable after the loop body. To *never* use the list iterator variable after the loop it was concluded to use a separate iterator variable instead of a found boolean [1]. This removes the need to use a found variable and simply checking if the variable was set, can determine if the break/goto was hit. Link: https://lore.kernel.org/all/CAHk-=wgRr_D8CB-D9Kg-c=EHreAsk5SqXPwr9Y7k9sA6cWXJ6w@mail.gmail.com/ Signed-off-by: Jakob Koschel <jakobkoschel@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220324072435.63070-1-jakobkoschel@gmail.com
2022-04-07soc: qcom: rpmhpd: Add SDX65 power domainsRohit Agarwal
Add power domains found in Qualcomm SDX65 SoC. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1647410837-22537-5-git-send-email-quic_rohiagar@quicinc.com
2022-04-07soc: qcom: smsm: Fix missing of_node_put() in smsm_parse_ipcMiaoqian Lin
The device_node pointer is returned by of_parse_phandle() with refcount incremented. We should use of_node_put() on it when done. Fixes: c97c4090ff72 ("soc: qcom: smsm: Add driver for Qualcomm SMSM") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220308073648.24634-1-linmq006@gmail.com
2022-04-07soc: qcom: smp2p: Fix missing of_node_put() in smp2p_parse_ipcMiaoqian Lin
The device_node pointer is returned by of_parse_phandle() with refcount incremented. We should use of_node_put() on it when done. Fixes: 50e99641413e ("soc: qcom: smp2p: Qualcomm Shared Memory Point to Point") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220308071942.22942-1-linmq006@gmail.com
2022-04-07soc: qcom: socinfo: Add another ID for SM8450Dmitry Baryshkov
Add another id for SM8450. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220228190013.1790617-1-dmitry.baryshkov@linaro.org
2022-04-07soc: qcom: socinfo: add SC7280 entry to soc_id arrayDouglas Anderson
Add an entry for SC7280 SoC. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220321161546.1.Ifc4270fbe9bad536f08a47696e00cca5a0714abd@changeid
2022-02-24soc: qcom: rpmpd: Add MSM8226 supportLuca Weiss
Add the power domains preset in MSM8226. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220220223004.507739-2-luca@z3ntu.xyz
2022-02-23soc: qcom: mdt_loader: Fix split-firmware conditionBjorn Andersson
The updated condition checking if a segment can be found in the loaded firmware blob, or need to be loaded from a separate file, incorrectly classifies segments that ends at the end of the loaded blob. The result is that the mdt loader attempts to load the segment from a separate file. Correct the conditional to use the loaded segment instead. Fixes: ea90330fa329 ("soc: qcom: mdt_loader: Extend check for split firmware") Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20220215034819.1209367-1-bjorn.andersson@linaro.org
2022-02-10soc: qcom: llcc: Add configuration data for SM8450 SoCSai Prakash Ranjan
Add LLCC configuration data for SM8450 SoC. Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com> Tested-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/fec944cb8f2a4a70785903c6bfec629c6f31b6a4.1643355594.git.quic_saipraka@quicinc.com
2022-02-10soc: qcom: llcc: Update register offsets for newer LLCC HWSai Prakash Ranjan
Newer LLCC HW have different register offsets for several registers, currently of which LLCC hardware info and status are used to identify the LLCC version information and other data. So use separate table to keep track of these register offsets which vary by different LLCC HW versions and eases any future addition in variations of register offsets for newer hardware. Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com> Tested-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/c655d16d945aef2d7fc8e7c212f3e1c58a84eb95.1643355594.git.quic_saipraka@quicinc.com
2022-02-10soc: qcom: llcc: Add missing llcc configuration dataSai Prakash Ranjan
Add missing llcc configuration data for few chipsets which were not added during initial post. Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com> Tested-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/143d11bacaca086406fdd10fc32f91eccd943527.1643355594.git.quic_saipraka@quicinc.com
2022-02-10soc: qcom: llcc: Add write-cache cacheable supportSai Prakash Ranjan
Newer SoCs with LLCC IP version 2.1.0.0 and later support write sub-cache cacheable feature. Use a separate llcc_slice_config member "write_scid_cacheable_en" to identify this feature and program LLCC_TRP_SCID_WRSC_CACHEABLE_EN register to enable it. Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com> Tested-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/83372c8178f579d055ec58212ce5af5d55abadd4.1643355594.git.quic_saipraka@quicinc.com
2022-02-10soc: qcom: llcc: Update the logic for version info extractionSai Prakash Ranjan
LLCC HW version info is made up of major, branch, minor and echo version bits each of which are 8bits. Several features in newer LLCC HW are based on the full version rather than just major or minor versions such as write-subcache enable which is applicable for versions v2.0.0.0 and later, also upcoming write-subcache cacheable for SM8450 SoC which is only present in versions v2.1.0.0 and later, so it makes it easier and cleaner to just directly compare with the full version than adding additional major/branch/ minor/echo version checks. So remove the earlier major version check and add full version check for those features. Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com> Tested-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/a82d7c32348c51fcc2b63e220d91b318bf706c83.1643355594.git.quic_saipraka@quicinc.com
2022-02-10soc: qcom: llcc: Add support for 16 ways of allocationHuang Yiwei
Add support for 16 ways of allocation for LLCC HW version 2.1.0 and later. Signed-off-by: Huang Yiwei <hyiwei@codeaurora.org> Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com> Tested-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/a7a5f64259c2c02628f03fb59b91e9fa78da2dfb.1643355594.git.quic_saipraka@quicinc.com
2022-02-10soc: qcom: socinfo: Add some more PMICs and SoCsBjorn Andersson
Add SM8350, SC8280XP, SA8540P and one more SM8450 and various PMICs found on boards on these platforms to the socinfo driver. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Tested-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20220210051043.748275-1-bjorn.andersson@linaro.org
2022-02-03soc: qcom: mdt_loader: Extract PAS operationsBjorn Andersson
Rather than passing a boolean to indicate if the PAS operations should be performed from within __mdt_load(), extract them to their own helper function. This will allow clients to invoke this directly, with some qcom_scm_pas_metadata context that they later needs to release, without further having to complicate the prototype of qcom_mdt_load(). Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220128025513.97188-9-bjorn.andersson@linaro.org
2022-02-03soc: qcom: mdt_loader: Always invoke PAS mem_setupBjorn Andersson
After spelunking various old kernel trees no finds has been found indicating that the PAS mem_setup call should actually be made conditional on the image being relocatable. Group the two PAS operations together, to facilitate splitting them out in a following patch. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220128025513.97188-8-bjorn.andersson@linaro.org
2022-02-03soc: qcom: mdt_loader: Reorder parts of __qcom_mdt_load()Bjorn Andersson
Move the traversal of the program headers to the start of the function, to make sure that min_ and max_addr are in scope as the call to qcom_scm_pas_mem_setup() is moved in the next commit. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220128025513.97188-7-bjorn.andersson@linaro.org
2022-02-03soc: qcom: mdt_loader: Extend check for split firmwareBjorn Andersson
Some of the Qualcomm SM8450 firmware files are padded such that the start of the first segment falls within the .mdt file but the segment to be loaded is stored as a separate .bNN file. Extend the condition to only attempt to read a segment inline if the entire segment would be available. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220128025513.97188-6-bjorn.andersson@linaro.org
2022-02-03soc: qcom: mdt_loader: Allow hash to reside in any segmentBjorn Andersson
It's been observed that some firmware found on Qualcomm SM8450 devices carries the hash segment as the last segment in the ELF. Extend the support to allow picking the hash from any segment in the MDT/MBN. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220128025513.97188-5-bjorn.andersson@linaro.org
2022-02-03soc: qcom: mdt_loader: Allow hash segment to be split outBjorn Andersson
It's been observed that some firmware found in a Qualcomm SM8450 device has the hash table in a separate .bNN file. Use the newly extracted helper function to load this segment from the separate file, if it's determined that the hashes are not part of the already loaded firmware. In order to do this, the function needs access to the firmware basename and to provide more useful error messages a struct device to associate the errors with. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220128025513.97188-4-bjorn.andersson@linaro.org
2022-02-03soc: qcom: mdt_loader: Split out split-file-loaderBjorn Andersson
Spotted in a SM8450 device, the hash metadata segment is split out in a separate .bNN file which means that the logic for loading split out segmenents needs to be duplicated in qcom_mdt_read_metadata(). Split out the existing logic to a helper function that can be used in both code paths. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220128025513.97188-3-bjorn.andersson@linaro.org
2022-02-03firmware: qcom: scm: Introduce pas_metadata contextBjorn Andersson
Starting with Qualcomm SM8450, some new security enhancements has been done in the secure world, which results in the requirement to keep the metadata segment accessible by the secure world from init_image() until auth_and_reset(). Introduce a "PAS metadata context" object that can be passed to init_image() for tracking the mapped memory and a related release function for client drivers to release the mapping once either auth_and_reset() has been invoked or in error handling paths on the way there. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220128025513.97188-2-bjorn.andersson@linaro.org
2022-01-31soc: qcom: aoss: remove spurious IRQF_ONESHOT flagsDaniel Thompson
Quoting the header comments, IRQF_ONESHOT is "Used by threaded interrupts which need to keep the irq line disabled until the threaded handler has been run.". When applied to an interrupt that doesn't request a threaded irq then IRQF_ONESHOT has a lesser known (undocumented?) side effect, which it to disable the forced threading of the irq. For "normal" kernels (without forced threading) then, if there is no thread_fn, then IRQF_ONESHOT is a nop. In this case disabling forced threading is not appropriate for this driver because it calls wake_up_all() and this API cannot be called from no-thread interrupt handlers on PREEMPT_RT systems (deadlock risk, triggers sleeping-while-atomic warnings). Fix this by removing IRQF_ONESHOT. Fixes: 2209481409b7 ("soc: qcom: Add AOSS QMP driver") Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org> [bjorn: Added Fixes tag] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220127173554.158111-1-daniel.thompson@linaro.org
2022-01-31soc: qcom: apr: Remove redundant 'flush_workqueue()' callsXu Wang
'destroy_workqueue()' already drains the queue before destroying it, so there is no need to flush it explicitly. Remove the redundant 'flush_workqueue()' calls. Signed-off-by: Xu Wang <vulab@iscas.ac.cn> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220114085019.42904-1-vulab@iscas.ac.cn
2022-01-31soc: qcom: aoss: Fix missing put_device call in qmp_getMiaoqian Lin
The reference taken by 'of_find_device_by_node()' must be released when not needed anymore. Add the corresponding 'put_device()' in the error handling paths. Fixes: 8c75d585b931 ("soc: qcom: aoss: Expose send for generic usecase") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220108095931.21527-1-linmq006@gmail.com
2022-01-31soc: qcom: ocmem: Fix missing put_device() call in of_get_ocmemMiaoqian Lin
The reference taken by 'of_find_device_by_node()' must be released when not needed anymore. Add the corresponding 'put_device()' in the error handling path. Fixes: 01f937ffc468 ("soc: qcom: ocmem: don't return NULL in of_get_ocmem") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220107073126.2335-1-linmq006@gmail.com
2022-01-31soc: qcom: rpmpd: Check for null return of devm_kcallocJiasheng Jiang
Because of the possible failure of the allocation, data->domains might be NULL pointer and will cause the dereference of the NULL pointer later. Therefore, it might be better to check it and directly return -ENOMEM without releasing data manually if fails, because the comment of the devm_kmalloc() says "Memory allocated with this function is automatically freed on driver detach.". Fixes: bbe3a66c3f5a ("soc: qcom: rpmpd: Add a Power domain driver to model corners") Signed-off-by: Jiasheng Jiang <jiasheng@iscas.ac.cn> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211231094419.1941054-1-jiasheng@iscas.ac.cn
2022-01-31soc: qcom: llcc: Use devm_bitmap_zalloc() when applicableChristophe JAILLET
'drv_data->bitmap' is a bitmap. So use 'devm_bitmap_zalloc()' to simplify code, improve the semantic. This also fixes a spurious indentation. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/3ee83f75afa8754fade4fff6a03b57f0ae3ccc28.1640245993.git.christophe.jaillet@wanadoo.fr
2021-12-20soc: qcom: rpmh-rsc: Fix typo in a commentJason Wang
The double `for' in the comment in line 694 is repeated. Remove one of them from the comment. Signed-off-by: Jason Wang <wangborong@cdjrlc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211211090626.248801-1-wangborong@cdjrlc.com
2021-12-20soc: qcom: socinfo: Add SM6350 and SM7225Luca Weiss
Both SoCs are known as 'lagoon' downstream. Add their ids to the socinfo driver. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211213081111.20217-1-luca.weiss@fairphone.com
2021-12-20soc: qcom: rpmhpd: Sort power-domain definitions and listsRajendra Nayak
Sort all power-domain defines and the SoC specific lists in alphabetical order for better readability. No functional changes. Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1639063917-9011-5-git-send-email-quic_rjendra@quicinc.com
2021-12-20soc: qcom: rpmhpd: Remove mx/cx relationship on sc7280Rajendra Nayak
The requirement to specify the active + sleep and active-only MX power-domains as the parents of the corresponding CX power domains is not applicable on sc7280. Fix it by using the cx/cx_ao structs for sc7280 instead of the _w_mx_parent ones. Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1639063917-9011-4-git-send-email-quic_rjendra@quicinc.com
2021-12-20soc: qcom: rpmhpd: Rename rpmhpd struct namesRajendra Nayak
The rpmhpd structs were named with a SoC-name prefix, but then they got reused across multiple SoC families making things confusing. Rename all the struct names to remove SoC-name prefixes. While we do this we end up with some power-domains without parents, and some with and at times different parents across SoCs. use a _w_<parent-name>_parent suffix for such cases. No functional change as part of this patch. Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1639063917-9011-3-git-send-email-quic_rjendra@quicinc.com
2021-12-20soc: qcom: rpmhpd: sm8450: Add the missing .peer for sm8450_cx_aoRajendra Nayak
sm8450_cx and sm8450_cx_ao should be peers of each other, add the missing .peer entry for sm8450_cx_ao Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Cc: Vinod Koul <vkoul@kernel.org> Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1639063917-9011-2-git-send-email-quic_rjendra@quicinc.com
2021-12-20soc: qcom: socinfo: add SM8450 IDDmitry Baryshkov
Add the ID for the Qualcomm SM8450 SoC. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211201072745.3969077-8-vkoul@kernel.org
2021-12-20soc: qcom: rpmhpd: Add SM8450 power domainsDmitry Baryshkov
Add the power domains exposed by RPMH in the Qualcomm SM8450 platform. Unlike previous generations CX domain is not a child of MX domain. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211201072745.3969077-7-vkoul@kernel.org
2021-12-20soc: qcom: smem: Update max processor countDmitry Baryshkov
Update max processor count to reflect the number of co-processors on SM8450 SoCs. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211201072745.3969077-5-vkoul@kernel.org
2021-12-20soc: qcom: rpmpd: Add support for sm6125Martin Botka
Add RPM power domains located in Qualcomm SM6125 SoC. Signed-off-by: Martin Botka <martin.botka@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211130212332.25401-2-martin.botka@somainline.org
2021-12-20soc: qcom: aoss: constify static struct thermal_cooling_device_opsRikard Falkeborn
The only usage of qmp_cooling_device_ops is to pass its address to devm_thermal_of_cooling_device_register() which takes a pointer to const struct thermal_cooling_device_ops as argument. Make it const to allow the compiler to put it in read-only memory. Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211128210317.25504-1-rikard.falkeborn@gmail.com
2021-12-20PM: AVS: qcom-cpr: Use div64_ul instead of do_divChangcheng Deng
do_div() does a 64-by-32 division. Here the divisor is an unsigned long which on some platforms is 64 bit wide. So use div64_ul instead of do_div to avoid a possible truncation. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Changcheng Deng <deng.changcheng@zte.com.cn> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211125014311.45942-1-deng.changcheng@zte.com.cn
2021-12-20soc: qcom: llcc: Add configuration data for SM8350Konrad Dybcio
Add LLCC configuration data for SM8350 SoC. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211121002050.36977-2-konrad.dybcio@somainline.org