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AgeCommit message (Expand)Author
2014-08-08drm/i915: Gather the HDMI level shifter logic into one placeDamien Lespiau
2014-08-08drm/i915: Introduce FBC False Color for debug purposes.Rodrigo Vivi
2014-08-08drm/i915: Align intel_dsi*.c files a bitDaniel Vetter
2014-08-08drm/i915: Add support for Video Burst Mode for MIPI DSIShobhit Kumar
2014-08-08drm/i915: Clarify CHV swing margin/deemph bitsVille Syrjälä
2014-08-08drm/i915: Call intel_{dp, hdmi}_prepare for chvVille Syrjälä
2014-08-08drm/i915: Split chv_update_pll() apartVille Syrjälä
2014-08-08drm/i915: Leave DPLL ref clocks onVille Syrjälä
2014-08-08drm/i915: Disable cdclk changes for chv until Punit is readyVille Syrjälä
2014-08-08drm/i915: Add cdclk change support for chvVille Syrjälä
2014-08-08d rm/i915: freeze display before the interrupts and GTPaulo Zanoni
2014-08-08drm/i915: Make ddi_clock_gate() HSW/BDW specificDaniel Vetter
2014-08-08drm/i915: Split the CDCLK retrieval per-platformDamien Lespiau
2014-08-08drm/i915: Make intel_ddi_calculate_wrpll() HSW/BDW specificDamien Lespiau
2014-08-08drm/i915: Split the BDW/HSW specific shared pll selectionDamien Lespiau
2014-08-08drm/i915: Fix stale comment for intel_ddi_pll_select()Damien Lespiau
2014-08-08drm/i915: Restrict hsw_dp_set_ddi_pll_sel() to HSW/BDWDamien Lespiau
2014-08-08drm/i915: Extract the HSW/BDW shared dpll init codeDamien Lespiau
2014-08-08drm/i915: Extract the HSW DDI selection code into its own functionDamien Lespiau
2014-08-08drm/i915: Add a space to the shared DPLL debug messageDamien Lespiau
2014-08-08drm/i915: Specify when the PLL hw state fields are validDamien Lespiau
2014-08-08drm/i915: Add DP training pattern 3 for CHVVille Syrjälä
2014-08-08drm/i915: Split a few long debug printsVille Syrjälä
2014-08-08drm/i915: Fix read back of plane stride registerRafael Barbalho
2014-08-08drm/i915: Add chv port D TX wellsVille Syrjälä
2014-08-08drm/i915: Add chv port B and C TX wellsVille Syrjälä
2014-08-08drm/i915: Add per-pipe power wells for chvVille Syrjälä
2014-08-08drm/i915: Add disp2d power well for chvVille Syrjälä
2014-08-08drm/i915: Kill intel_reset_dpio()Ville Syrjälä
2014-08-08drm/i915: Add chv cmnlane power wellsVille Syrjälä
2014-08-08drm/i915: Add chv_power_wells[]Ville Syrjälä
2014-08-08drm/i915: Kill intel_crtc->vbl_waitVille Syrjälä
2014-08-08drm: Add drm_crtc_vblank_waitqueue()Ville Syrjälä
2014-08-08drm/i915: State readout and cross-checking for dp_m2_n2Vandana Kannan
2014-08-08drm/i915: Set M2_N2 registers during mode setVandana Kannan
2014-08-08Revert "drm/i915: Enable semaphores on BDW"Rodrigo Vivi
2014-08-08drm/i915: read HEAD register back in init_ring_common() to enforce orderingJiri Kosina
2014-08-08drm/i915: Fix crash when failing to parse MIPI VBTRafael Barbalho
2014-08-07drm/i915: Bring GPU Freq to min while suspending.Deepak S
2014-08-07drm/i915: Fix DEIER and GTIER collecting for BDW.Rodrigo Vivi
2014-08-07drm/i915: Don't accumulate hangcheck score on forward progressMika Kuoppala
2014-08-07drm/i915: Add the WaCsStallBeforeStateCacheInvalidate:bdw workaround.Kenneth Graunke
2014-08-07drm/i915: Refactor Broadwell PIPE_CONTROL emission into a helper.Kenneth Graunke
2014-08-07drm/i915: Fix threshold for choosing 32 vs. 64 precisions for VLV DDL valuesVille Syrjälä
2014-08-07drm/i915: Fix drain latency precision multipler for VLVZhenyu Wang
2014-08-07drm/i915: Collect gtier properly on HSW.Rodrigo Vivi
2014-08-07drm/i915: Tune down MCH_SSKPD values warningDaniel Vetter
2014-08-07drm/i915: Tune done rc6 enabling outputDaniel Vetter
2014-08-07drm/i915: Don't require dev->struct_mutex in psr_match_conditionsDaniel Vetter
2014-08-07drm/i915: Fix error state collectingRodrigo Vivi