| Age | Commit message (Collapse) | Author |
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soc/drivers
Reset controller updates for v6.13
* Split the Amlogic reset-meson driver into platform and auxiliary
bus drivers. Add support for the reset controller in the G12 and
SM1 audio clock controllers.
* Replace the list of boolean parameters to the internal
reset_control_get functions with an enum reset_flags bitfield,
to make the code more self-descriptive.
* Add devres helpers to request pre-deasserted (and automatically
re-asserting during cleanup) reset controls. This allows reducing
boilerplate in drivers that deassert resets for the lifetime of a
device.
* Use the new auto-deasserting devres helpers in reset-uniphier-glue
as an example.
* Add support for the LAN966x PCI device in drivers/misc, as a
dependency for the following reset-microchip-sparx5 patches.
* Add support for being used on the LAN966x PCI device to the
reset-microchip-sparx5 driver.
Commit 86f134941a4b ("MAINTAINERS: Add the Microchip LAN966x PCI driver
entry") introduces a trivial merge conflict with commit 7280f01e79cc
("net: lan969x: add match data for lan969x") from the net-next tree [1].
[1] https://lore.kernel.org/all/20241101122505.3eacd183@canb.auug.org.au/
* tag 'reset-for-v6.13' of git://git.pengutronix.de/pza/linux: (21 commits)
misc: lan966x_pci: Fix dtc warn 'Missing interrupt-parent'
misc: lan966x_pci: Fix dtc warns 'missing or empty reg/ranges property'
reset: mchp: sparx5: set the dev member of the reset controller
reset: mchp: sparx5: Allow building as a module
reset: mchp: sparx5: Add MCHP_LAN966X_PCI dependency
reset: mchp: sparx5: Map cpu-syscon locally in case of LAN966x
MAINTAINERS: Add the Microchip LAN966x PCI driver entry
misc: Add support for LAN966x PCI device
reset: uniphier-glue: Use devm_reset_control_bulk_get_shared_deasserted()
reset: Add devres helpers to request pre-deasserted reset controls
reset: replace boolean parameters with flags parameter
reset: amlogic: Fix small whitespace issue
reset: amlogic: add auxiliary reset driver support
reset: amlogic: split the device core and platform probe
reset: amlogic: move drivers to a dedicated directory
reset: amlogic: add reset status support
reset: amlogic: use reset number instead of register count
reset: amlogic: add driver parameters
reset: amlogic: make parameters unsigned
reset: amlogic: use generic data matching function
...
Link: https://lore.kernel.org/r/20241105105229.3729474-1-p.zabel@pengutronix.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/drivers
Arm SCMI updates for v6.13
Just couple of main additions:
1. Support for variable I/O width within ARM SCMI shared memory area.
Some shared memory areas might only support a certain access width,
such as 32-bit, which memcpy_{from,to}_io() does not adhere to at least
on ARM64 by making both 8-bit and 64-bit accesses to such memory.
This support updates the shmem layer to support reading from and
writing to such shared memory area using the specified I/O width
in the Device Tree. The various transport layers making use of the
shmem.c code are updated accordingly to pass the I/O accessors that
they store. The device tree bindings are also updated for the same.
2. Extension of SCMI transport bindings to add more properties
SCMI transports are characterized by a number of properties. The
values assumed by some of them tightly depend on the choices taken at
design time and on the overall archiecture of the specific platform:
things like timeouts, maximum message size and number of in-flight
messages are closely tied to the architecture of the platform like
number of SCMI agents on the system, physical memory available to the
SCMI platform and so on. Such details are not discoverable as they are
outside the scope of the SCMI protocol specification.
Currently such properties are simple default values defined at build
time, but the increasing number and variety of platforms using SCMI
with a wide range of designs has increased the need to have a way to
describe such properties across all these platforms.
Apart from the above two, there is one NULL pointer dereference fix for
very age old SCPI protocol driver which seems to be still in use on few
platforms.
* tag 'scmi-updates-6.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
firmware: arm_scpi: Check the DVFS OPP count returned by the firmware
firmware: arm_scmi: Relocate atomic_threshold to scmi_desc
firmware: arm_scmi: Use max_msg and max_msg_size devicetree properties
dt-bindings: firmware: arm,scmi: Introduce more transport properties
firmware: arm_scmi: Calculate virtio PDU max size dynamically
firmware: arm_scmi: Account for SHMEM memory overhead
firmware: arm_scmi: Support 'reg-io-width' property for shared memory
dt-bindings: sram: Document reg-io-width property
firmware: arm_scmi: Use vendor string in max-rx-timeout-ms
dt-bindings: firmware: arm,scmi: Add missing vendor string
firmware: arm_scmi: Reject clear channel request on A2P
firmware: arm_scmi: Fix slab-use-after-free in scmi_bus_notifier()
Link: https://lore.kernel.org/r/20241106110727.4007489-1-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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After commit 0edb555a65d1 ("platform: Make platform_driver::remove()
return void") .remove() is (again) the right callback to implement for
platform drivers.
Convert all platform drivers below drivers/bus to use .remove(), with
the eventual goal to drop struct platform_driver::remove_new(). As
.remove() and .remove_new() have the same prototypes, conversion is done
by just changing the structure member name in the driver initializer.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Fix a kernel crash with the below call trace when the SCPI firmware
returns OPP count of zero.
dvfs_info.opp_count may be zero on some platforms during the reboot
test, and the kernel will crash after dereferencing the pointer to
kcalloc(info->count, sizeof(*opp), GFP_KERNEL).
| Unable to handle kernel NULL pointer dereference at virtual address 0000000000000028
| Mem abort info:
| ESR = 0x96000004
| Exception class = DABT (current EL), IL = 32 bits
| SET = 0, FnV = 0
| EA = 0, S1PTW = 0
| Data abort info:
| ISV = 0, ISS = 0x00000004
| CM = 0, WnR = 0
| user pgtable: 4k pages, 48-bit VAs, pgdp = 00000000faefa08c
| [0000000000000028] pgd=0000000000000000
| Internal error: Oops: 96000004 [#1] SMP
| scpi-hwmon: probe of PHYT000D:00 failed with error -110
| Process systemd-udevd (pid: 1701, stack limit = 0x00000000aaede86c)
| CPU: 2 PID: 1701 Comm: systemd-udevd Not tainted 4.19.90+ #1
| Hardware name: PHYTIUM LTD Phytium FT2000/4/Phytium FT2000/4, BIOS
| pstate: 60000005 (nZCv daif -PAN -UAO)
| pc : scpi_dvfs_recalc_rate+0x40/0x58 [clk_scpi]
| lr : clk_register+0x438/0x720
| Call trace:
| scpi_dvfs_recalc_rate+0x40/0x58 [clk_scpi]
| devm_clk_hw_register+0x50/0xa0
| scpi_clk_ops_init.isra.2+0xa0/0x138 [clk_scpi]
| scpi_clocks_probe+0x528/0x70c [clk_scpi]
| platform_drv_probe+0x58/0xa8
| really_probe+0x260/0x3d0
| driver_probe_device+0x12c/0x148
| device_driver_attach+0x74/0x98
| __driver_attach+0xb4/0xe8
| bus_for_each_dev+0x88/0xe0
| driver_attach+0x30/0x40
| bus_add_driver+0x178/0x2b0
| driver_register+0x64/0x118
| __platform_driver_register+0x54/0x60
| scpi_clocks_driver_init+0x24/0x1000 [clk_scpi]
| do_one_initcall+0x54/0x220
| do_init_module+0x54/0x1c8
| load_module+0x14a4/0x1668
| __se_sys_finit_module+0xf8/0x110
| __arm64_sys_finit_module+0x24/0x30
| el0_svc_common+0x78/0x170
| el0_svc_handler+0x38/0x78
| el0_svc+0x8/0x340
| Code: 937d7c00 a94153f3 a8c27bfd f9400421 (b8606820)
| ---[ end trace 06feb22469d89fa8 ]---
| Kernel panic - not syncing: Fatal exception
| SMP: stopping secondary CPUs
| Kernel Offset: disabled
| CPU features: 0x10,a0002008
| Memory Limit: none
Fixes: 8cb7cf56c9fe ("firmware: add support for ARM System Control and Power Interface(SCPI) protocol")
Signed-off-by: Luo Qiu <luoqiu@kylinsec.com.cn>
Message-Id: <55A2F7A784391686+20241101032115.275977-1-luoqiu@kylinsec.com.cn>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
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https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap into arm/drivers
soc: ti: driver updates for v6.13
* tag 'omap-for-v6.13/drivers-signed' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap:
thermal/ti-soc-thermal: Fix typos
soc: ti: smartreflex: Use IRQF_NO_AUTOEN flag in request_irq()
Link: https://lore.kernel.org/r/7hplnaomtt.fsf@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into arm/drivers
MediaTek soc driver updates for v6.13
This adds support for the MT8188 SoC in the MediaTek Regulator
Coupler driver, allowing stable GPU DVFS on this chip;
Moreover, this adds a new MediaTek DVFS Resource Collector (DVFSRC)
driver, allowing to enable other drivers (interconnect, regulator)
which can now communicate with the DVFSRC hardware.
Last but not least, this includes some cleanups for the CMDQ Helper
and MediaTek SVS drivers.
* tag 'mtk-soc-for-v6.13' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux:
soc: mediatek: mtk-svs: Call of_node_put(np) only once in svs_get_subsys_device()
soc: mediatek: mediatek-regulator-coupler: Support mt8188
soc: mediatek: mtk-cmdq: Move cmdq_instruction init to declaration
soc: mediatek: mtk-cmdq: Move mask build and append to function
soc: mediatek: Add MediaTek DVFS Resource Collector (DVFSRC) driver
dt-bindings: soc: mediatek: Add DVFSRC bindings for MT8183 and MT8195
Link: https://lore.kernel.org/r/20241104112625.161365-2-angelogioacchino.delregno@collabora.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers
i.MX drivers changes for 6.13:
- A series from Marek Vasut to probe soc-imx8m as platform driver,
so that it works properly with 'driver_async_probe' kernel parameter.
* tag 'imx-drivers-6.13' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx8m: Use devm_* to simplify probe failure handling
soc: imx8m: Remove global soc_uid
soc: imx8m: Probe the SoC driver as platform driver
Link: https://lore.kernel.org/r/20241104090055.1881860-1-shawnguo2@yeah.net
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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dtc generates the following warning when building the LAN966x devicetree
overlay (lan966x_pci.dtso):
Warning (interrupts_property): /fragment@0/__overlay__/pci-ep-bus@0/oic@e00c0120: Missing interrupt-parent
The oic interrupt parent is the PCI device itself. The PCI device node
is the node on which the dtbo will be applied and this node already has
properties needed.
In order to remove the warning, add the missing properties in the
overlay fragment node. Properties in this node will not be added when
the overlay is applied (which is what we expect) but makes dtc happy.
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Closes: https://lore.kernel.org/all/20241025110919.64b1cffb@canb.auug.org.au/
Fixes: 185686beb464 ("misc: Add support for LAN966x PCI device")
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20241029084338.194942-3-herve.codina@bootlin.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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dtc generates the following warnings when building the LAN966x device
tree overlay (lan966x_pci.dtso):
Warning (simple_bus_reg): /fragment@0/__overlay__/pci-ep-bus@0/cpu_clk: missing or empty reg/ranges property
Warning (simple_bus_reg): /fragment@0/__overlay__/pci-ep-bus@0/ddr_clk: missing or empty reg/ranges property
Warning (simple_bus_reg): /fragment@0/__overlay__/pci-ep-bus@0/sys_clk: missing or empty reg/ranges property
Indeed, related nodes are under the pci-ep-bus (simple-bus) which is not
correct.
Put them outside this node.
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Closes: https://lore.kernel.org/all/20241025110919.64b1cffb@canb.auug.org.au/
Fixes: 185686beb464 ("misc: Add support for LAN966x PCI device")
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20241029084338.194942-2-herve.codina@bootlin.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers
Qualcomm driver updates for v6.13
Enable QSEECOM, and thereby access to EFI variables, for Lenovo Yoga
Slim 7x, Dell XPS 13, Microsoft Surface Pro 9.
Last Level Cache Controller (LLCC) driver code is shuffled, to improve
readability of the tables.
The Qualcomm socinfo driver gains support for QCS615, QCS9100, SAR1130P,
SAR2130P, and SA8255P.
A few drivers are simplified using dev_err_probe() and guard(), and a
few kernel-doc issues are corrected.
Mentioning of the #linux-msm IRC channel is added to the MAINTAINERS
file.
* tag 'qcom-drivers-for-6.13' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (30 commits)
soc: qcom: socinfo: add QCS9100 ID
dt-bindings: arm: qcom,ids: add SoC ID for QCS9100
dt-bindings: soc: qcom,aoss-qmp: Document the QCS8300 AOSS channel
dt-bindings: soc: qcom: add qcom,qcs8300-imem compatible
dt-bindings: firmware: qcom,scm: document SCM on QCS8300 SoCs
soc: qcom: socinfo: add support for SA8255P
dt-bindings: arm: qcom: add the SoC ID for SA8255P
soc: qcom: smp2p: Simplify code with dev_err_probe()
soc: qcom: smem: Simplify code with dev_err_probe()
soc: qcom: rpmh-rsc: Simplify code with dev_err_probe()
dt-bindings: soc: qcom: aoss-qmp: document support for SA8255p
dt-bindings: firmware: qcom,scm: document support for SA8255p
dt-bindings: soc: qcom,aoss-qmp: Add SAR2130P compatible
dt-bindings: firmware: qcom,scm: Add SAR2130P compatible
soc: qcom: socinfo: add SoC IDs for SAR1130P and SAR2130P
dt-bindings: arm: qcom,ids: add SoC ID for SAR2130P and SAR1130P
dt-bindings: soc: qcom: aoss-qmp: Add SM8750
soc: qcom: socinfo: Add QCS615 SoC ID table entry
dt-bindings: arm: qcom,ids: add SoC ID for QCS615
soc: qcom: smem: Fix up kerneldoc
...
Link: https://lore.kernel.org/r/20241102231953.871067-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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arm/drivers
arm64: ZynqMP SoC changes for 6.13
event_manager:
- cleanup error path
firmware:
- add support for new SMC layout
- fix feature check logic
- extend debug interface
- update reset ID format
- report about unsupported feature in pinctrl
* tag 'zynqmp-soc-for-6.13' of https://github.com/Xilinx/linux-xlnx:
firmware: xilinx: fix feature check logic for TF-A specific APIs
firmware: xilinx: add support for new SMC call format
firmware: xilinx: add a warning print for unsupported feature
firmware: xilinx: use u32 for reset ID in reset APIs
firmware: xilinx: Add missing debug firmware interfaces
drivers: soc: xilinx: add the missing kfree in xlnx_add_cb_for_suspend()
Link: https://lore.kernel.org/r/CAHTX3dK9PKmG_UG4MW=x5KmZCrd5PkcAZiNVgPFQ_zsPRgu+dg@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers
Memory controller drivers for v6.13
1. Freescale IFC: Split handling of child nodes in the bindings to
fix dtbs_check warning.
2. ARM64 defconfig: Nothing selects CONFIG_FSL_IFC anymore since
commit 9ba0cae3cac0 ("memory: fsl_ifc: Make FSL_IFC config visible
and selectable") and actually CONFIG_MTD_NAND_FSL_IFC depends on it
now. Enable CONFIG_FSL_IFC in ARM64 defconfig, so users of it won't
lose these two drivers.
* tag 'memory-controller-drv-6.13' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
arm64: defconfig: Update defconfig with now user-visible CONFIG_FSL_IFC
dt-bindings: memory-controllers: fsl,ifc: split child node differences
Link: https://lore.kernel.org/r/20241029075348.19580-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers
firmware: tegra: Changes for v6.13-rc1
This contains a revert for a patch that I had modified before applying
and the author didn't agree with the change.
* tag 'tegra-for-6.13-firmware' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
Revert "firmware: tegra: bpmp: Use scoped device node handling to simplify error paths"
Link: https://lore.kernel.org/r/20241025150555.2558582-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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into arm/drivers
HiSilicon driver updates for v6.13
- Add the sysfs to show all HCCS types used on the platform
- Add the low power feature for HCCS by adjusting the lane number
- Few cleanups and improvements: correct a PCC typo, verify the die, port
information, base address and size, update the lane_mode to max_lane_num
* tag 'hisi-drivers-for-6.13' of https://github.com/hisilicon/linux-hisi:
soc: hisilicon: kunpeng_hccs: Support low power feature for the specified HCCS type
soc: hisilicon: kunpeng_hccs: Add used HCCS types sysfs
soc: hisilicon: kunpeng_hccs: Fix the 'lane_mode' field name in port info structure to 'max_lane_num'
soc: hisilicon: kunpeng_hccs: Add the check for base address and size of shared memory
soc: hisilicon: kunpeng_hccs: Return failure on having not die or port information
soc: hisilicon: kunpeng_hccs: Fix a PCC typo
Link: https://lore.kernel.org/r/671B3FBD.8050905@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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After commit 0edb555a65d1 ("platform: Make platform_driver::remove()
return void") .remove() is (again) the right callback to implement for
platform drivers.
Convert all platform drivers below drivers/soc to use .remove(), with
the eventual goal to drop struct platform_driver::remove_new(). As
.remove() and .remove_new() have the same prototypes, conversion is done
by just changing the structure member name in the driver initializer.
On the way do a few whitespace changes to make indention consistent.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Herve Codina <herve.codina@bootlin.com> # for fsl/qe/{qmc,tsa}.c
Acked-by: Bjorn Andersson <andersson@kernel.org> # qcom parts
Acked-by: Gabriel Somlo <gsomlo@gmail.com>
Acked-by: Andrew Jeffery <andrew@codeconstruct.com.au> # aspeed
Link: https://lore.kernel.org/r/20241029074859.509587-2-u.kleine-koenig@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add the ID for the Qualcomm QCS9100 SoC.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
Link: https://lore.kernel.org/r/20240911-add_qcs9100_support-v2-2-e43a71ceb017@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Add the ID for the Qualcomm QCS9100 SoC.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
Link: https://lore.kernel.org/r/20240911-add_qcs9100_support-v2-1-e43a71ceb017@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Document the Always-On Subsystem side channel on the Qualcomm QCS8300
platform for communication with client found on the SoC such as
remoteprocs.
Signed-off-by: Kyle Deng <quic_chunkaid@quicinc.com>
Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20240911-qcs8300_binding-v2-4-de8641b3eaa1@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Document qcom,qcs8300-imem compatible. It has child node for debug
purpose.
Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20240911-qcs8300_binding-v2-3-de8641b3eaa1@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Document scm compatible for the Qualcomm QCS8300 SoC. It is an interface
to communicate to the secure firmware.
Signed-off-by: Zhenhua Huang <quic_zhenhuah@quicinc.com>
Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20240911-qcs8300_binding-v2-2-de8641b3eaa1@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Add SocInfo support for SA8255P.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Nikunj Kela <quic_nkela@quicinc.com>
Link: https://lore.kernel.org/r/20240910171534.2412263-3-quic_nkela@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Add the SoC ID entry for SA8255P.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Nikunj Kela <quic_nkela@quicinc.com>
Link: https://lore.kernel.org/r/20240910171534.2412263-2-quic_nkela@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Use dev_err_probe() directly in the driver probe phase, and we
don't need to judge if the error code is not equal to -EPROBE_DEFER.
This can simplify the code a bit.
Signed-off-by: Zhang Zekun <zhangzekun11@huawei.com>
Link: https://lore.kernel.org/r/20240909122921.12627-5-zhangzekun11@huawei.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Use dev_err_probe() directly in the driver probe phase, and we
don't need to judge if the error code is not equal to -EPROBE_DEFER.
This can simplify the code a bit.
Signed-off-by: Zhang Zekun <zhangzekun11@huawei.com>
Link: https://lore.kernel.org/r/20240909122921.12627-4-zhangzekun11@huawei.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Use dev_err_probe() directly in the driver probe phase, and we
don't need to judge if the error code is not equal to -EPROBE_DEFER.
This can simplify the code a bit.
Signed-off-by: Zhang Zekun <zhangzekun11@huawei.com>
Link: https://lore.kernel.org/r/20240909122921.12627-2-zhangzekun11@huawei.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Add compatible for AOSS QMP representing support on SA8255p.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Nikunj Kela <quic_nkela@quicinc.com>
Link: https://lore.kernel.org/r/20240905192328.3778542-1-quic_nkela@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Add a compatible for the SA8255p platform's Secure Channel Manager
firmware interface.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Nikunj Kela <quic_nkela@quicinc.com>
Link: https://lore.kernel.org/r/20240905183016.3742735-1-quic_nkela@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Relocate the atomic_threshold field to scmi_desc and move the related code
to scmi_transport_setup.
No functional change.
Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
Message-Id: <20241028120151.1301177-6-cristian.marussi@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
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Override the default built-in max_msg and max_msg_size transport properties
when the corresponding properties were found to be described in the
devicetree.
Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
Message-Id: <20241028120151.1301177-5-cristian.marussi@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
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Depending on specific hardware and firmware design choices, it may be
possible for different platforms to end up having different requirements
regarding the same transport characteristics.
Introduce max-msg-size and max-msg properties to describe such platform
specific transport constraints, since they cannot be discovered otherwise.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
Message-Id: <20241028120151.1301177-4-cristian.marussi@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
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SCMI virtio transport maximum PDU size is currently hardcoded at build
time; this will not play well with the possibile retrieval of a different
size at run-time.
Make the virtio transport derive the maximum PDU size from the max_msg_size
provided by the SCMI core.
No functional change.
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
Message-Id: <20241028120151.1301177-3-cristian.marussi@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
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Transports using shared memory have to consider the overhead due to the
layout area when determining the area effectively available for messages.
Till now, such definitions were ambiguos across the SCMI stack and the
overhead layout area was not considered at all.
Add proper checks in the shmem layer to validate the provided max_msg_size
against the effectively available memory area, less the layout.
Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
Message-Id: <20241028120151.1301177-2-cristian.marussi@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
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Some shared memory areas might only support a certain access width,
such as 32-bit, which memcpy_{from,to}_io() does not adhere to at least
on ARM64 by making both 8-bit and 64-bit accesses to such memory.
Update the shmem layer to support reading from and writing to such
shared memory area using the specified I/O width in the Device Tree. The
various transport layers making use of the shmem.c code are updated
accordingly to pass the I/O accessors that they store.
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
Message-Id: <20240827182450.3608307-3-florian.fainelli@broadcom.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
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Some SRAMs need to be accessed with a specific access width, define
the 'reg-io-width' property specifying such access sizes.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
Message-Id: <20240827182450.3608307-2-florian.fainelli@broadcom.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
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The original optional property was missing a vendor string prefix; this
has been rectified.
Fix the naming of such optional property in code too.
Cc: Peng Fan <peng.fan@nxp.com>
Fixes: 1780e411ef94 ("firmware: arm_scmi: Use max-rx-timeout-ms from devicetree")
Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
Message-Id: <20241028120151.1301177-8-cristian.marussi@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
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Recently introduced max-rx-timeout-ms optionao property is missing a
vendor prefix.
Add the vendor prefix so that it aligns with the new properties that
are about to get added soon.
Fixes: 3a5e6ab06eab ("dt-bindings: firmware: arm,scmi: Introduce property max-rx-timeout-ms")
Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
Message-Id: <20241028120151.1301177-7-cristian.marussi@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
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error paths"
This reverts commit 8812b8689ee6 ("firmware: tegra: bpmp: Use scoped
device node handling to simplify error paths") because it was silently
modified by committer during commit process, by moving declaration of
'struct device_node *np' above the initializer/constructor. Such code
was not intention of the author, is not conforming to cleanup.h code
style and decreases the code readability.
I did not write such code and I did not agree to put my name with such
commit.
Original patch:
https://lore.kernel.org/all/20240816135722.105945-2-krzysztof.kozlowski@linaro.org/
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
[treding@nvidia.com: shorten subject line]
Signed-off-by: Thierry Reding <treding@nvidia.com>
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In order to guarantee the device will not be deleted by the reset
controller consumer, set the dev member of the reset controller.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://lore.kernel.org/r/20241014124636.24221-7-herve.codina@bootlin.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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This reset controller can be used by the LAN966x PCI device.
The LAN966x PCI device driver can be built as a module and this reset
controller driver has no reason to be a builtin driver in that case.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://lore.kernel.org/r/20241014124636.24221-6-herve.codina@bootlin.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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The sparx5 reset controller depends on the SPARX5 architecture or the
LAN966x SoC.
This reset controller can be used by the LAN966x PCI device and so it
needs to be available when the LAN966x PCI device is enabled.
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://lore.kernel.org/r/20241014124636.24221-5-herve.codina@bootlin.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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In the LAN966x PCI device use case, the syscon API cannot be used as
it does not support device removal [1]. A syscon device is a core
"system" device and not a device available in some addon boards and so,
it is not supposed to be removed. The syscon API follows this assumption
but this assumption is no longer valid in the LAN966x use case.
In order to avoid the use of the syscon API and so, support for removal,
use a local mapping of the syscon device.
Link: https://lore.kernel.org/all/20240923100741.11277439@bootlin.com/ [1]
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://lore.kernel.org/r/20241014124636.24221-4-herve.codina@bootlin.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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After contributing the driver, add myself as the maintainer for the
Microchip LAN966x PCI driver.
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Link: https://lore.kernel.org/r/20241014124636.24221-3-herve.codina@bootlin.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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Add a PCI driver that handles the LAN966x PCI device using a device-tree
overlay. This overlay is applied to the PCI device DT node and allows to
describe components that are present in the device.
The memory from the device-tree is remapped to the BAR memory thanks to
"ranges" properties computed at runtime by the PCI core during the PCI
enumeration.
The PCI device itself acts as an interrupt controller and is used as the
parent of the internal LAN966x interrupt controller to route the
interrupts to the assigned PCI INTx interrupt.
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Bjorn Helgaas <bhelgaas@google.com> # quirks.c
Link: https://lore.kernel.org/r/20241014124636.24221-2-herve.codina@bootlin.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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Document compatible for the Always-On Subsystem on SAR2130P platform.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20241017-sar2130p-soc-v1-1-7f9c204710c3@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Document compatible for the SCM firmware interface on SAR2130P platform.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20241017-sar2130p-scm-v1-1-cc74a6b75c94@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Add SoC IDs for Qualcomm SAR1130P and SAR2130P platforms.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20241018-sar2130p-socinfo-v1-2-b1e97ea963fe@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Add the IDs for Qualcomm SAR2130P and SAR1130P platforms.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20241018-sar2130p-socinfo-v1-1-b1e97ea963fe@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Document compatible for Qualcomm SM8750 SoC Always-on SubSystem (AOSS),
compatible with existing generic fallback.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20241022064214.22868-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Add SoC Info support for the QCS615 platform.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com>
Link: https://lore.kernel.org/r/20241022-add_initial_support_for_qcs615-v4-4-0a551c6dd342@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Add the ID for the Qualcomm QCS615 SoC.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com>
Link: https://lore.kernel.org/r/20241022-add_initial_support_for_qcs615-v4-2-0a551c6dd342@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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