<feed xmlns='http://www.w3.org/2005/Atom'>
<title>lwn.git/include/linux/irq.h, branch standardize-docs</title>
<subtitle>Linux kernel documentation tree maintained by Jonathan Corbet</subtitle>
<id>http://mirrors.hust.edu.cn/git/lwn.git/atom?h=standardize-docs</id>
<link rel='self' href='http://mirrors.hust.edu.cn/git/lwn.git/atom?h=standardize-docs'/>
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<updated>2017-06-22T16:21:25+00:00</updated>
<entry>
<title>genirq: Introduce IRQD_SINGLE_TARGET flag</title>
<updated>2017-06-22T16:21:25+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2017-06-19T23:37:52+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=d52dd44175bd27ad9d8e34a994fb80877c1f6d61'/>
<id>urn:sha1:d52dd44175bd27ad9d8e34a994fb80877c1f6d61</id>
<content type='text'>
Many interrupt chips allow only a single CPU as interrupt target. The core
code has no knowledge about that. That's unfortunate as it could avoid
trying to readd a newly online CPU to the effective affinity mask.

Add the status flag and the necessary accessors.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Jens Axboe &lt;axboe@kernel.dk&gt;
Cc: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Cc: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Cc: Keith Busch &lt;keith.busch@intel.com&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Christoph Hellwig &lt;hch@lst.de&gt;
Link: http://lkml.kernel.org/r/20170619235447.352343969@linutronix.de

</content>
</entry>
<entry>
<title>genirq/cpuhotplug: Handle managed IRQs on CPU hotplug</title>
<updated>2017-06-22T16:21:25+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2017-06-19T23:37:51+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=c5cb83bb337c25caae995d992d1cdf9b317f83de'/>
<id>urn:sha1:c5cb83bb337c25caae995d992d1cdf9b317f83de</id>
<content type='text'>
If a CPU goes offline, interrupts affine to the CPU are moved away. If the
outgoing CPU is the last CPU in the affinity mask the migration code breaks
the affinity and sets it it all online cpus.

This is a problem for affinity managed interrupts as CPU hotplug is often
used for power management purposes. If the affinity is broken, the
interrupt is not longer affine to the CPUs to which it was allocated.

The affinity spreading allows to lay out multi queue devices in a way that
they are assigned to a single CPU or a group of CPUs. If the last CPU goes
offline, then the queue is not longer used, so the interrupt can be
shutdown gracefully and parked until one of the assigned CPUs comes online
again.

Add a graceful shutdown mechanism into the irq affinity breaking code path,
mark the irq as MANAGED_SHUTDOWN and leave the affinity mask unmodified.

In the online path, scan the active interrupts for managed interrupts and
if the interrupt is functional and the newly online CPU is part of the
affinity mask, restart the interrupt if it is marked MANAGED_SHUTDOWN or if
the interrupts is started up, try to add the CPU back to the effective
affinity mask.

Originally-by: Christoph Hellwig &lt;hch@lst.de&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Jens Axboe &lt;axboe@kernel.dk&gt;
Cc: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Cc: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Cc: Keith Busch &lt;keith.busch@intel.com&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Link: http://lkml.kernel.org/r/20170619235447.273417334@linutronix.de

</content>
</entry>
<entry>
<title>genirq: Handle managed irqs gracefully in irq_startup()</title>
<updated>2017-06-22T16:21:24+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2017-06-19T23:37:50+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=761ea388e8c4e3ac883a94e16bcc8c51fa419d4f'/>
<id>urn:sha1:761ea388e8c4e3ac883a94e16bcc8c51fa419d4f</id>
<content type='text'>
Affinity managed interrupts should keep their assigned affinity accross CPU
hotplug. To avoid magic hackery in device drivers, the core code shall
manage them transparently and set these interrupts into a managed shutdown
state when the last CPU of the assigned affinity mask goes offline. The
interrupt will be restarted when one of the CPUs in the assigned affinity
mask comes back online.

Add the necessary logic to irq_startup(). If an interrupt is requested and
started up, the code checks whether it is affinity managed and if so, it
checks whether a CPU in the interrupts affinity mask is online. If not, it
puts the interrupt into managed shutdown state. 

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Jens Axboe &lt;axboe@kernel.dk&gt;
Cc: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Cc: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Cc: Keith Busch &lt;keith.busch@intel.com&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Christoph Hellwig &lt;hch@lst.de&gt;
Link: http://lkml.kernel.org/r/20170619235447.189851170@linutronix.de

</content>
</entry>
<entry>
<title>genirq: Introduce IRQD_MANAGED_SHUTDOWN</title>
<updated>2017-06-22T16:21:23+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2017-06-19T23:37:47+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=54fdf6a0875ca380647ac1cc9b5b8f2dbbbfa131'/>
<id>urn:sha1:54fdf6a0875ca380647ac1cc9b5b8f2dbbbfa131</id>
<content type='text'>
Affinity managed interrupts should keep their assigned affinity accross CPU
hotplug. To avoid magic hackery in device drivers, the core code shall
manage them transparently. This will set these interrupts into a managed
shutdown state when the last CPU of the assigned affinity mask goes
offline. The interrupt will be restarted when one of the CPUs in the
assigned affinity mask comes back online.

Introduce the necessary state flag and the accessor functions.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Jens Axboe &lt;axboe@kernel.dk&gt;
Cc: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Cc: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Cc: Keith Busch &lt;keith.busch@intel.com&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Christoph Hellwig &lt;hch@lst.de&gt;
Link: http://lkml.kernel.org/r/20170619235446.954523476@linutronix.de

</content>
</entry>
<entry>
<title>genirq: Introduce effective affinity mask</title>
<updated>2017-06-22T16:21:20+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2017-06-19T23:37:38+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=0d3f54257dc300f2db480d6a46b34bdb87f18c1b'/>
<id>urn:sha1:0d3f54257dc300f2db480d6a46b34bdb87f18c1b</id>
<content type='text'>
There is currently no way to evaluate the effective affinity mask of a
given interrupt. Many irq chips allow only a single target CPU or a subset
of CPUs in the affinity mask.

Updating the mask at the time of setting the affinity to the subset would
be counterproductive because information for cpu hotplug about assigned
interrupt affinities gets lost. On CPU hotplug it's also pointless to force
migrate an interrupt, which is not targeted at the CPU effectively. But
currently the information is not available.

Provide a seperate mask to be updated by the irq_chip-&gt;irq_set_affinity()
implementations. Implement the read only proc files so the user can see the
effective mask as well w/o trying to deduce it from /proc/interrupts.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Jens Axboe &lt;axboe@kernel.dk&gt;
Cc: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Cc: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Cc: Keith Busch &lt;keith.busch@intel.com&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Christoph Hellwig &lt;hch@lst.de&gt;
Link: http://lkml.kernel.org/r/20170619235446.247834245@linutronix.de

</content>
</entry>
<entry>
<title>genirq: Move irq_fixup_move_pending() to core</title>
<updated>2017-06-22T16:21:19+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2017-06-19T23:37:34+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=36d84fb45140f151fa4e145381dbce5e5ffed24d'/>
<id>urn:sha1:36d84fb45140f151fa4e145381dbce5e5ffed24d</id>
<content type='text'>
Now that x86 uses the generic code, the function declaration and inline
stub can move to the core internal header.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Jens Axboe &lt;axboe@kernel.dk&gt;
Cc: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Cc: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Cc: Keith Busch &lt;keith.busch@intel.com&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Christoph Hellwig &lt;hch@lst.de&gt;
Link: http://lkml.kernel.org/r/20170619235445.928156166@linutronix.de

</content>
</entry>
<entry>
<title>genirq/cpuhotplug: Add support for cleaning up move in progress</title>
<updated>2017-06-22T16:21:17+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2017-06-19T23:37:29+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=f0383c24b4855f6a4b5a358c7b2d2c16e0437e9b'/>
<id>urn:sha1:f0383c24b4855f6a4b5a358c7b2d2c16e0437e9b</id>
<content type='text'>
In order to move x86 to the generic hotplug migration code, add support for
cleaning up move in progress bits.

On architectures which have this x86 specific (mis)feature not enabled,
this is optimized out by the compiler.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Jens Axboe &lt;axboe@kernel.dk&gt;
Cc: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Cc: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Cc: Keith Busch &lt;keith.busch@intel.com&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Christoph Hellwig &lt;hch@lst.de&gt;
Link: http://lkml.kernel.org/r/20170619235445.525817311@linutronix.de

</content>
</entry>
<entry>
<title>genirq: Provide irq_fixup_move_pending()</title>
<updated>2017-06-22T16:21:13+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2017-06-19T23:37:19+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=cdd16365b0bd7c0cd19e2cc768b6bdc8021f32c3'/>
<id>urn:sha1:cdd16365b0bd7c0cd19e2cc768b6bdc8021f32c3</id>
<content type='text'>
If an CPU goes offline, the interrupts are migrated away, but a eventually
pending interrupt move, which has not yet been made effective is kept
pending even if the outgoing CPU is the sole target of the pending affinity
mask. What's worse is, that the pending affinity mask is discarded even if
it would contain a valid subset of the online CPUs.

Implement a helper function which allows to avoid these issues.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Jens Axboe &lt;axboe@kernel.dk&gt;
Cc: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Cc: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Cc: Keith Busch &lt;keith.busch@intel.com&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Christoph Hellwig &lt;hch@lst.de&gt;
Link: http://lkml.kernel.org/r/20170619235444.691345468@linutronix.de

</content>
</entry>
<entry>
<title>genirq: Add missing comment for IRQD_STARTED</title>
<updated>2017-06-22T16:21:13+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2017-06-19T23:37:18+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=1bb0401680da156ce1549e915e711bf5b2534cc5'/>
<id>urn:sha1:1bb0401680da156ce1549e915e711bf5b2534cc5</id>
<content type='text'>
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Cc: Jens Axboe &lt;axboe@kernel.dk&gt;
Cc: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Cc: Keith Busch &lt;keith.busch@intel.com&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Christoph Hellwig &lt;hch@lst.de&gt;
Link: http://lkml.kernel.org/r/20170619235444.614913014@linutronix.de

</content>
</entry>
<entry>
<title>irq/generic-chip: Provide devm_irq_setup_generic_chip()</title>
<updated>2017-06-21T13:53:11+00:00</updated>
<author>
<name>Bartosz Golaszewski</name>
<email>brgl@bgdev.pl</email>
</author>
<published>2017-05-31T16:07:00+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=30fd8fc5c91973485705f83c7efe9588b8e6f371'/>
<id>urn:sha1:30fd8fc5c91973485705f83c7efe9588b8e6f371</id>
<content type='text'>
Provide a resource managed variant of irq_setup_generic_chip().

Signed-off-by: Bartosz Golaszewski &lt;brgl@bgdev.pl&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Acked-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Cc: linux-doc@vger.kernel.org
Cc: Jonathan Corbet &lt;corbet@lwn.net&gt;
Link: http://lkml.kernel.org/r/1496246820-13250-6-git-send-email-brgl@bgdev.pl

</content>
</entry>
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