lwn.git/include/drm/bridge/dw_hdmi.h, branch docs-mw

drm/bridge: imx: add driver for HDMI TX Parallel Audio Interface

2025-09-29T01:46:04+00:00

The HDMI TX Parallel Audio Interface (HTX_PAI) is a digital module that acts as the bridge between the Audio Subsystem to the HDMI TX Controller. This IP block is found in the HDMI subsystem of the i.MX8MP SoC. Data received from the audio subsystem can have an arbitrary component ordering. The HTX_PAI block has integrated muxing options to select which sections of the 32-bit input data word will be mapped to each IEC60958 field. The HTX_PAI_FIELD_CTRL register contains mux selects to individually select P,C,U,V,Data, and Preamble. Use component helper so that imx8mp-hdmi-tx will be aggregate driver, imx8mp-hdmi-pai will be component driver, then imx8mp-hdmi-pai can use bind() ops to get the plat_data from imx8mp-hdmi-tx device. Signed-off-by: Shengjiu Wang Reviewed-by: Liu Ying Tested-by: Alexander Stein Signed-off-by: Liu Ying Link: https://lore.kernel.org/r/20250923053001.2678596-6-shengjiu.wang@nxp.com

drm/bridge: dw-hdmi: Add API dw_hdmi_set_sample_iec958() for iec958 format

2025-09-29T01:46:04+00:00

Add API dw_hdmi_set_sample_iec958() for IEC958 format because audio device driver needs IEC958 information to configure this specific setting. Signed-off-by: Shengjiu Wang Acked-by: Liu Ying Tested-by: Alexander Stein Signed-off-by: Liu Ying Link: https://lore.kernel.org/r/20250923053001.2678596-5-shengjiu.wang@nxp.com

drm/bridge: dw-hdmi: Add API dw_hdmi_to_plat_data() to get plat_data

2025-09-29T01:46:03+00:00

Add API dw_hdmi_to_plat_data() to fetch plat_data because audio device driver needs it to enable(disable)_audio(). Signed-off-by: Shengjiu Wang Acked-by: Liu Ying Tested-by: Alexander Stein Signed-off-by: Liu Ying Link: https://lore.kernel.org/r/20250923053001.2678596-4-shengjiu.wang@nxp.com

drm/bridge: dw-hdmi: change YUV420 selection logic at clock setup

2023-06-27T07:51:31+00:00

Right now clocking value selection code is prioritising RGB, YUV444 modes over YUV420 for HDMI2 sinks. However, because of the bus format selection procedure in dw-hdmi, for HDMI2 sinks YUV420 is the format that will always be picked during the drm bridge chain check stage. Later on dw_hdmi_setup will configure a colour space based on the bus format that doesn't match the pixel value we had calculated as described above. Fix it by bringing back dw-hdmi bus format check when picking the right pixel clock. Signed-off-by: Adrián Larumbe Acked-by: Neil Armstrong Signed-off-by: Neil Armstrong Link: https://patchwork.freedesktop.org/patch/msgid/6230bfae2cd97cf6527fc62ba5c850464919ccf8.1687702042.git.adrian.larumbe@collabora.com

drm: bridge: dw_hdmi: Audio: Add General Parallel Audio (GPA) driver

2022-04-19T16:23:48+00:00

General Parallel Audio (GPA) interface is one of the supported audio interface for synopsys HDMI module, which has verified for i.MX8MPlus platform. This is initial version for GPA. Signed-off-by: Shengjiu Wang Signed-off-by: Sandor Yu Reviewed-by: Neil Armstrong Signed-off-by: Robert Foss Link: https://patchwork.freedesktop.org/patch/msgid/f21ba3e8c4d9d028ac74c6f3c588ddbffe739399.1649989179.git.Sandor.yu@nxp.com

drm: bridge: dw_hdmi: add reset function for PHY GEN1

2022-04-19T16:19:03+00:00

PHY reset register(MC_PHYRSTZ) active high reset control for PHY GEN2, and active low reset control for PHY GEN1. Rename function dw_hdmi_phy_reset to dw_hdmi_phy_gen2_reset. Add dw_hdmi_phy_gen1_reset function for PHY GEN1. Signed-off-by: Sandor Yu Reviewed-by: Neil Armstrong Acked-by: Jernej Skrabec Signed-off-by: Robert Foss Link: https://patchwork.freedesktop.org/patch/msgid/e0b3be2d63fe3e95246fb8b8b0dcd57415b29e04.1649989179.git.Sandor.yu@nxp.com

drm: bridge: dw-hdmi: Attach to next bridge if available

2021-07-28T13:33:13+00:00

On all platforms except i.MX and Rockchip, the dw-hdmi DT bindings require a video output port connected to an HDMI sink (most likely an HDMI connector, in rare cases another bridges converting HDMI to another protocol). For those platforms, retrieve the next bridge and attach it from the dw-hdmi bridge attach handler. Signed-off-by: Laurent Pinchart Reviewed-by: Neil Armstrong Tested-by: Kieran Bingham # On V3U Reviewed-by: Kieran Bingham

drm/bridge/synopsys: dw-hdmi: Add an option to suppress loading CEC driver

2021-04-20T15:22:38+00:00

This adds DW-HDMI driver a glue option to disable loading of the CEC sub-driver. On some SoCs, the CEC functionality is enabled in the IP config bits, but the CEC bus is non-functional like on Amlogic SoCs, where the CEC config bit is set but the DW-HDMI CEC signal is not connected to a physical pin, leading to some confusion when the DW-HDMI CEC controller can't communicate on the bus. Reviewed-by: Neil Armstrong Signed-off-by: Jernej Skrabec Signed-off-by: Neil Armstrong Acked-by: Hans Verkuil Link: https://patchwork.freedesktop.org/patch/msgid/20210416092737.1971876-2-narmstrong@baylibre.com

drm: bridge: dw-hdmi: Pass drm_display_info to dw_hdmi_support_scdc()

2020-06-23T17:57:06+00:00

To prepare for making connector creation optional in the driver, pass the drm_display_info explicitly to dw_hdmi_support_scdc(). The pointer is passed to the callers where required, particularly to the dw_hdmi_phy_ops .init() function. Signed-off-by: Laurent Pinchart Reviewed-by: Neil Armstrong Signed-off-by: Sam Ravnborg Link: https://patchwork.freedesktop.org/patch/msgid/20200526011505.31884-19-laurent.pinchart+renesas@ideasonboard.com

drm: bridge: dw-hdmi: Constify mode argument to dw_hdmi_phy_ops .init()

2020-06-23T17:56:25+00:00

The PHY .init() must not modify the mode it receives. Make the pointer const to enfore that. Signed-off-by: Laurent Pinchart Reviewed-by: Neil Armstrong Signed-off-by: Sam Ravnborg Link: https://patchwork.freedesktop.org/patch/msgid/20200526011505.31884-17-laurent.pinchart+renesas@ideasonboard.com