lwn.git/include/asm-mips/bootinfo.h, branch v6.8-rc5

MIPS: Move headfiles to new location below arch/mips/include

2008-10-11T15:18:52+00:00

Signed-off-by: Ralf Baechle

[MIPS] Routerboard 532: Support for base system

2008-07-20T13:38:18+00:00

Signed-off-by: Phil Sutter Signed-off-by: Florian Fainelli Signed-off-by: Ralf Baechle

[MIPS] Remove mips_machtype for LASAT machines

2008-07-15T17:44:39+00:00

This is the LASAT part of the mips_machtype removal. Signed-off-by: Thomas Bogendoerfer Signed-off-by: Ralf Baechle

[MIPS] Remove mips_machtype from EMMA2RH machines

2008-07-15T17:44:39+00:00

This is the EMMA2RH part of the mips_machtype removal. [Ralf: Fixed to the #error statements] Signed-off-by: Thomas Bogendoerfer Signed-off-by: Ralf Baechle

[MIPS] Remove mips_machtype from ARC based machines

2008-07-15T17:44:38+00:00

This is the ARC part of the mips_machtype removal. Signed-off-by: Thomas Bogendoerfer Signed-off-by: Ralf Baechle

[MIPS] remove machtype for group Toshiba

2008-07-15T17:44:38+00:00

Signed-off-by: Yoichi Yuasa Acked-by: Atsushi Nemoto Signed-off-by: Ralf Baechle

[MIPS] RM: Collected changes

2008-01-29T10:14:59+00:00

- EISA support for non PCI RMs (RM200 and RM400-xxx). The major part is the splitting of the EISA and onboard ISA of the RM200, which makes the EISA bus on the RM200 look like on other RMs. - 64bit kernel support - system type detection is now common for big and little endian - moved sniprom code to arch/mips/fw - added call_o32 function to arch/mips/fw/lib, which uses a private stack for calling prom functions - fix problem with ISA interrupts, which makes using PIT clockevent possible Signed-off-by: Thomas Bogendoerfer Signed-off-by: Ralf Baechle

[MIPS] remove unused mips_machtype

2008-01-29T10:14:55+00:00

Removed unused mips_machtype. These are only set but not used. Signed-off-by: Yoichi Yuasa Signed-off-by: Ralf Baechle

[MIPS] ARC: Get rid of mips_machgroup

2007-10-11T22:46:08+00:00

This has not been any serious user of this ill conceived thing since the original invention in like '95. Signed-off-by: Ralf Baechle

[MIPS] Add support for BCM47XX CPUs.

2007-10-11T22:46:02+00:00

Note that the BCM4710 does not support the wait instruction, this is not a mistake in the code. It originally comes from the OpenWrt patches. Cc: Michael Buesch Cc: Felix Fietkau Cc: Florian Schirmer Signed-off-by: Aurelien Jarno Signed-off-by: Andrew Morton Signed-off-by: Ralf Baechle