lwn.git/drivers/ptp/ptp_clockmatrix.h, branch docs-next

ptp: ptp_clockmatrix: Add .getmaxphase ptp_clock_info callback

2023-06-20T08:02:33+00:00

Advertise the maximum offset the .adjphase callback is capable of supporting in nanoseconds for IDT ClockMatrix devices. Depend on ptp_clock_adjtime for handling out-of-range offsets. ptp_clock_adjtime returns -ERANGE instead of clamping out-of-range offsets. Cc: Richard Cochran Cc: Vincent Cheng Signed-off-by: Rahul Rameshbabu Signed-off-by: David S. Miller

ptp: ptp_clockmatrix: return -EBUSY if phase pull-in is in progress

2022-05-18T00:49:04+00:00

Also removes PEROUT_ENABLE_OUTPUT_MASK Signed-off-by: Min Li Acked-by: Richard Cochran Link: https://lore.kernel.org/r/1652712427-14703-2-git-send-email-min.li.xe@renesas.com Signed-off-by: Jakub Kicinski

ptp: ptp_clockmatrix: Add PTP_CLK_REQ_EXTTS support

2022-05-18T00:49:04+00:00

Use TOD_READ_SECONDARY for extts to keep TOD_READ_PRIMARY for gettime and settime exclusively. Before this change, TOD_READ_PRIMARY was used for both extts and gettime/settime, which would result in changing TOD read/write triggers between operations. Using TOD_READ_SECONDARY would make extts independent of gettime/settime operation Signed-off-by: Min Li Acked-by: Richard Cochran Link: https://lore.kernel.org/r/1652712427-14703-1-git-send-email-min.li.xe@renesas.com Signed-off-by: Jakub Kicinski

ptp: clockmatrix: use rsmu driver to access i2c/spi bus

2021-09-27T11:16:48+00:00

rsmu (Renesas Synchronization Management Unit ) driver is located in drivers/mfd and responsible for creating multiple devices including clockmatrix phc, which will then use the exposed regmap and mutex handle to access i2c/spi bus. Signed-off-by: Min Li Signed-off-by: David S. Miller

ptp: ptp_clockmatrix: Add support for pll_mode=0 and manual ref switch of WF and WP

2021-09-14T13:22:12+00:00

Also correct how initialize_dco_operating_mode is called Signed-off-by: Min Li Signed-off-by: David S. Miller

ptp: ptp_clockmatrix: Add support for FW 5.2 (8A34005)

2021-09-14T13:22:12+00:00

So far we don't need to support new 5.2 functions but different register addresses Signed-off-by: Min Li Signed-off-by: David S. Miller

ptp: ptp_clockmatrix: Remove unused header declarations.

2021-02-17T21:49:25+00:00

Removed unused header declarations. Signed-off-by: Vincent Cheng Signed-off-by: David S. Miller

ptp: ptp_clockmatrix: Add wait_for_sys_apll_dpll_lock.

2021-02-17T21:49:25+00:00

Part of the device initialization aligns the rising edge of the output clock to the internal 1 PPS clock. If the system APLL and DPLL is not locked, then the alignment will fail and there will be a fixed offset between the internal 1 PPS clock and the output clock. After loading the device firmware, poll the system APLL and DPLL for locked state prior to initialization, timing out after 2 seconds. Signed-off-by: Vincent Cheng Acked-by: Richard Cochran Signed-off-by: David S. Miller

ptp: clockmatrix: deprecate firmware older than 4.8.7

2020-12-09T23:00:55+00:00

Add deprecated flag to indicate < v4.8.7. Fix idtcm_enable_tod() call correct settime(). Signed-off-by: Min Li Link: https://lore.kernel.org/r/1607442117-13661-4-git-send-email-min.li.xe@renesas.com Signed-off-by: Jakub Kicinski

ptp: clockmatrix: Fix non-zero phase_adj is lost after snap

2020-12-09T23:00:55+00:00

Fix non-zero phase_adj is lost after snap. Use ktime_sub to do ktime_t subtraction. Signed-off-by: Min Li Link: https://lore.kernel.org/r/1607442117-13661-3-git-send-email-min.li.xe@renesas.com Signed-off-by: Jakub Kicinski