<feed xmlns='http://www.w3.org/2005/Atom'>
<title>lwn.git/drivers/net/vmxnet3, branch header-removal</title>
<subtitle>Linux kernel documentation tree maintained by Jonathan Corbet</subtitle>
<id>http://mirrors.hust.edu.cn/git/lwn.git/atom?h=header-removal</id>
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<updated>2021-08-24T14:38:29+00:00</updated>
<entry>
<title>ethtool: extend coalesce setting uAPI with CQE mode</title>
<updated>2021-08-24T14:38:29+00:00</updated>
<author>
<name>Yufeng Mo</name>
<email>moyufeng@huawei.com</email>
</author>
<published>2021-08-20T07:35:18+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=f3ccfda1931977b80267ba54070a1aeafa18f6ca'/>
<id>urn:sha1:f3ccfda1931977b80267ba54070a1aeafa18f6ca</id>
<content type='text'>
In order to support more coalesce parameters through netlink,
add two new parameter kernel_coal and extack for .set_coalesce
and .get_coalesce, then some extra info can return to user with
the netlink API.

Signed-off-by: Yufeng Mo &lt;moyufeng@huawei.com&gt;
Signed-off-by: Huazhong Tan &lt;tanhuazhong@huawei.com&gt;
Signed-off-by: Jakub Kicinski &lt;kuba@kernel.org&gt;
</content>
</entry>
<entry>
<title>vmxnet3: switch from 'pci_' to 'dma_' API</title>
<updated>2021-08-23T11:02:28+00:00</updated>
<author>
<name>Christophe JAILLET</name>
<email>christophe.jaillet@wanadoo.fr</email>
</author>
<published>2021-08-22T15:09:48+00:00</published>
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<id>urn:sha1:bf7bec4620352c1931d3bd32112e6c677ae7af88</id>
<content type='text'>
The wrappers in include/linux/pci-dma-compat.h should go away.

The patch has been generated with the coccinelle script below.

It has been hand modified to use 'dma_set_mask_and_coherent()' instead of
'pci_set_dma_mask()/pci_set_consistent_dma_mask()' when applicable.
This is less verbose.

The explicit 'err = -EIO;' has been removed because
'dma_set_mask_and_coherent()' returns 0 or -EIO, so its return code can be
used directly.

It has been compile tested.

@@
@@
-    PCI_DMA_BIDIRECTIONAL
+    DMA_BIDIRECTIONAL

@@
@@
-    PCI_DMA_TODEVICE
+    DMA_TO_DEVICE

@@
@@
-    PCI_DMA_FROMDEVICE
+    DMA_FROM_DEVICE

@@
@@
-    PCI_DMA_NONE
+    DMA_NONE

@@
expression e1, e2, e3;
@@
-    pci_alloc_consistent(e1, e2, e3)
+    dma_alloc_coherent(&amp;e1-&gt;dev, e2, e3, GFP_)

@@
expression e1, e2, e3;
@@
-    pci_zalloc_consistent(e1, e2, e3)
+    dma_alloc_coherent(&amp;e1-&gt;dev, e2, e3, GFP_)

@@
expression e1, e2, e3, e4;
@@
-    pci_free_consistent(e1, e2, e3, e4)
+    dma_free_coherent(&amp;e1-&gt;dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_map_single(e1, e2, e3, e4)
+    dma_map_single(&amp;e1-&gt;dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_unmap_single(e1, e2, e3, e4)
+    dma_unmap_single(&amp;e1-&gt;dev, e2, e3, e4)

@@
expression e1, e2, e3, e4, e5;
@@
-    pci_map_page(e1, e2, e3, e4, e5)
+    dma_map_page(&amp;e1-&gt;dev, e2, e3, e4, e5)

@@
expression e1, e2, e3, e4;
@@
-    pci_unmap_page(e1, e2, e3, e4)
+    dma_unmap_page(&amp;e1-&gt;dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_map_sg(e1, e2, e3, e4)
+    dma_map_sg(&amp;e1-&gt;dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_unmap_sg(e1, e2, e3, e4)
+    dma_unmap_sg(&amp;e1-&gt;dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_single_for_cpu(e1, e2, e3, e4)
+    dma_sync_single_for_cpu(&amp;e1-&gt;dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_single_for_device(e1, e2, e3, e4)
+    dma_sync_single_for_device(&amp;e1-&gt;dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_sg_for_cpu(e1, e2, e3, e4)
+    dma_sync_sg_for_cpu(&amp;e1-&gt;dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_sg_for_device(e1, e2, e3, e4)
+    dma_sync_sg_for_device(&amp;e1-&gt;dev, e2, e3, e4)

@@
expression e1, e2;
@@
-    pci_dma_mapping_error(e1, e2)
+    dma_mapping_error(&amp;e1-&gt;dev, e2)

@@
expression e1, e2;
@@
-    pci_set_dma_mask(e1, e2)
+    dma_set_mask(&amp;e1-&gt;dev, e2)

@@
expression e1, e2;
@@
-    pci_set_consistent_dma_mask(e1, e2)
+    dma_set_coherent_mask(&amp;e1-&gt;dev, e2)

Signed-off-by: Christophe JAILLET &lt;christophe.jaillet@wanadoo.fr&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>vmxnet3: update to version 6</title>
<updated>2021-07-17T00:32:14+00:00</updated>
<author>
<name>Ronak Doshi</name>
<email>doshir@vmware.com</email>
</author>
<published>2021-07-16T22:36:26+00:00</published>
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<id>urn:sha1:ce2639ad6921fbaf8a854b5d1b1033adee685e6e</id>
<content type='text'>
With all vmxnet3 version 6 changes incorporated in the vmxnet3 driver,
the driver can configure emulation to run at vmxnet3 version 6, provided
the emulation advertises support for version 6.

Signed-off-by: Ronak Doshi &lt;doshir@vmware.com&gt;
Acked-by: Guolin Yang &lt;gyang@vmware.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>vmxnet3: increase maximum configurable mtu to 9190</title>
<updated>2021-07-17T00:32:14+00:00</updated>
<author>
<name>Ronak Doshi</name>
<email>doshir@vmware.com</email>
</author>
<published>2021-07-16T22:36:25+00:00</published>
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<id>urn:sha1:8c5663e461e6914304bbbf2c1cf67e5dce18740f</id>
<content type='text'>
This patch increases the maximum configurable mtu to 9190
to accommodate jumbo packets of overlay traffic.

Signed-off-by: Ronak Doshi &lt;doshir@vmware.com&gt;
Acked-by: Guolin Yang &lt;gyang@vmware.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>vmxnet3: set correct hash type based on rss information</title>
<updated>2021-07-17T00:32:14+00:00</updated>
<author>
<name>Ronak Doshi</name>
<email>doshir@vmware.com</email>
</author>
<published>2021-07-16T22:36:24+00:00</published>
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<id>urn:sha1:b3973bb40041eb336188d16fcc249000ea3c4bf4</id>
<content type='text'>
As vmxnet3 supports IP/TCP/UDP RSS, this patch sets appropriate
hash type based on the type of RSS performed.

Signed-off-by: Ronak Doshi &lt;doshir@vmware.com&gt;
Acked-by: Guolin Yang &lt;gyang@vmware.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>vmxnet3: add support for ESP IPv6 RSS</title>
<updated>2021-07-17T00:32:14+00:00</updated>
<author>
<name>Ronak Doshi</name>
<email>doshir@vmware.com</email>
</author>
<published>2021-07-16T22:36:23+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=79d124bb36c0662e16e1ae01e7ff68ab80eb67a8'/>
<id>urn:sha1:79d124bb36c0662e16e1ae01e7ff68ab80eb67a8</id>
<content type='text'>
Vmxnet3 version 4 added support for ESP RSS. However, only IPv4 was
supported. With vmxnet3 version 6, this patch enables RSS for ESP
IPv6 packets as well.

Signed-off-by: Ronak Doshi &lt;doshir@vmware.com&gt;
Acked-by: Guolin Yang &lt;gyang@vmware.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>vmxnet3: remove power of 2 limitation on the queues</title>
<updated>2021-07-17T00:32:14+00:00</updated>
<author>
<name>Ronak Doshi</name>
<email>doshir@vmware.com</email>
</author>
<published>2021-07-16T22:36:22+00:00</published>
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<id>urn:sha1:15ccf2f4b09c4443435e815b8086bc161da27e24</id>
<content type='text'>
With version 6, vmxnet3 relaxes the restriction on queues to
be power of two. This is helpful in cases (Edge VM) where
vcpus are less than 8 and device requires more than 4 queues.

Signed-off-by: Ronak Doshi &lt;doshir@vmware.com&gt;
Acked-by: Guolin Yang &lt;gyang@vmware.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>vmxnet3: add support for 32 Tx/Rx queues</title>
<updated>2021-07-17T00:32:14+00:00</updated>
<author>
<name>Ronak Doshi</name>
<email>doshir@vmware.com</email>
</author>
<published>2021-07-16T22:36:21+00:00</published>
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<id>urn:sha1:39f9895a00f4c5f50e4e0a94f710c6a87afb1920</id>
<content type='text'>
Currently, vmxnet3 supports maximum of 8 Tx/Rx queues. With increase
in number of vcpus on a VM, to achieve better performance and utilize
idle vcpus, we need to increase the max number of queues supported.

This patch enhances vmxnet3 to support maximum of 32 Tx/Rx queues.
Increasing the Rx queues also increases the probability of distrubuting
the traffic from different flows to different queues with RSS.

Signed-off-by: Ronak Doshi &lt;doshir@vmware.com&gt;
Acked-by: Guolin Yang &lt;gyang@vmware.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>vmxnet3: prepare for version 6 changes</title>
<updated>2021-07-17T00:32:14+00:00</updated>
<author>
<name>Ronak Doshi</name>
<email>doshir@vmware.com</email>
</author>
<published>2021-07-16T22:36:20+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=69dbef0d1c22476c422ee255e99d0e112ddd829d'/>
<id>urn:sha1:69dbef0d1c22476c422ee255e99d0e112ddd829d</id>
<content type='text'>
vmxnet3 is currently at version 4 and this patch initiates the
preparation to accommodate changes for upto version 6. Introduced
utility macros for vmxnet3 version 6 comparison and update Copyright
information.

Signed-off-by: Ronak Doshi &lt;doshir@vmware.com&gt;
Acked-by: Guolin Yang &lt;gyang@vmware.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>vmxnet3: fix cksum offload issues for tunnels with non-default udp ports</title>
<updated>2021-07-02T20:41:15+00:00</updated>
<author>
<name>Ronak Doshi</name>
<email>doshir@vmware.com</email>
</author>
<published>2021-07-02T06:44:27+00:00</published>
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<id>urn:sha1:b22580233d473dbf7bbfa4f6549c09e2c80e9e64</id>
<content type='text'>
Commit dacce2be3312 ("vmxnet3: add geneve and vxlan tunnel offload
support") added support for encapsulation offload. However, the inner
offload capability is to be restricted to UDP tunnels with default
Vxlan and Geneve ports.

This patch fixes the issue for tunnels with non-default ports using
features check capability and filtering appropriate features for such
tunnels.

Fixes: dacce2be3312 ("vmxnet3: add geneve and vxlan tunnel offload support")
Signed-off-by: Ronak Doshi &lt;doshir@vmware.com&gt;
Acked-by: Guolin Yang &lt;gyang@vmware.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
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