<feed xmlns='http://www.w3.org/2005/Atom'>
<title>lwn.git/drivers/net/e1000e/es2lan.c, branch docs-6.1</title>
<subtitle>Linux kernel documentation tree maintained by Jonathan Corbet</subtitle>
<id>http://mirrors.hust.edu.cn/git/lwn.git/atom?h=docs-6.1</id>
<link rel='self' href='http://mirrors.hust.edu.cn/git/lwn.git/atom?h=docs-6.1'/>
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<updated>2011-08-11T03:03:27+00:00</updated>
<entry>
<title>intel: Move the Intel wired LAN drivers</title>
<updated>2011-08-11T03:03:27+00:00</updated>
<author>
<name>Jeff Kirsher</name>
<email>jeffrey.t.kirsher@intel.com</email>
</author>
<published>2011-04-07T14:42:33+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=dee1ad47f2ee75f5146d83ca757c1b7861c34c3b'/>
<id>urn:sha1:dee1ad47f2ee75f5146d83ca757c1b7861c34c3b</id>
<content type='text'>
Moves the Intel wired LAN drivers into drivers/net/ethernet/intel/ and
the necessary Kconfig and Makefile changes.

Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>intel drivers: repair missing flush operations</title>
<updated>2011-08-04T11:59:07+00:00</updated>
<author>
<name>Jesse Brandeburg</name>
<email>jesse.brandeburg@intel.com</email>
</author>
<published>2011-07-20T00:56:21+00:00</published>
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<id>urn:sha1:945a51517cc0bd9e461f2018624dfc1faef9ddee</id>
<content type='text'>
after review of all intel drivers, found several instances where
drivers had the incorrect pattern of:
memory mapped write();
delay();

which should always be:
memory mapped write();
write flush(); /* aka memory mapped read */
delay();

explanation:
The reason for including the flush is that writes can be held
(posted) in PCI/PCIe bridges, but the read always has to complete
synchronously and therefore has to flush all pending writes to a
device.  If a write is held and followed by a delay, the delay
means nothing because the write may not have reached hardware
(maybe even not until the next read)

Signed-off-by: Jesse Brandeburg &lt;jesse.brandeburg@intel.com&gt;
Tested-by:  Aaron Brown &lt;aaron.f.brown@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>e1000e: disable far-end loopback mode on ESB2</title>
<updated>2011-06-10T03:31:24+00:00</updated>
<author>
<name>Bruce Allan</name>
<email>bruce.w.allan@intel.com</email>
</author>
<published>2011-05-13T07:19:42+00:00</published>
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<id>urn:sha1:d9b24135b972ccdd5f5174fba06c730e895e6daf</id>
<content type='text'>
The ESB2 LAN includes a debug feature that enables far-end loopback (FELB)
of the SerDes/Kumeran interface.  This feature is activated when receiving
a sequence of symbols that includes a reserved codeword.  On a perfect
link, FELB would never be activated.  In the presence of bit errors, there
is a very small, but non-zero, probability of FELB being activated.

If the FELB is activated, the SerDes link becomes non-functional and must
be reset.  It could also corrupt the switching tables in the switch since
the ESB2 is transmitting packets with a different source MAC address.

This patch disables the FELB feature.

Signed-off-by: Bruce Allan &lt;bruce.w.allan@intel.com&gt;
Tested-by: Aaron Brown &lt;aaron.f.brown@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>e1000e: implement ethtool set_phys_id</title>
<updated>2011-04-27T09:05:53+00:00</updated>
<author>
<name>Bruce Allan</name>
<email>bruce.w.allan@intel.com</email>
</author>
<published>2011-04-16T00:34:40+00:00</published>
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<id>urn:sha1:dbf80dcbd8ca0c50f343401fedd2d6200cb8097e</id>
<content type='text'>
Based on a patch from Stephen Hemminger &lt;shemminger@vyatta.com&gt;.

The new ethtool set_phys_id takes over controlling the LED for
identifying boards.  This fixes the lockout during that period.
For this device lots of extra infrastructure can also be removed by
using set_phys_id.

v2: - return blink frequency for parts that do not support blink in h/w
    - add blink_led function pointers for devices that do support blink
      in h/w to cleanup the test for this functionality

Signed-off-by: Bruce Allan &lt;bruce.w.allan@intel.com&gt;
Cc: Stephen Hemminger &lt;shemminger@vyatta.com&gt;
Tested-by: Aaron Brown &lt;aaron.f.brown@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>e1000e: convert short duration msleep() to usleep_range()</title>
<updated>2011-04-14T02:17:06+00:00</updated>
<author>
<name>Bruce Allan</name>
<email>bruce.w.allan@intel.com</email>
</author>
<published>2011-03-19T00:27:20+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=1bba4386ab4f67a53c9649268dd9c83bc6110a9b'/>
<id>urn:sha1:1bba4386ab4f67a53c9649268dd9c83bc6110a9b</id>
<content type='text'>
With durations less than 20ms, the jiffies or legacy timer backed msleep()
may sleep ~20ms which might not be what the caller expects.  Instead, it
is recommended to use the hrtimers backed usleep_range().  For more, see
Documentation/timers/timers-howto.txt.  Issues reported by checkpatch.

In addition, remove unnecessary sleep in e1000e_write_nvm_spi().

Signed-off-by: Bruce Allan &lt;bruce.w.allan@intel.com&gt;
Tested-by: Aaron Brown &lt;aaron.f.brown@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>e1000e: update Copyright for 2011</title>
<updated>2011-01-14T10:04:01+00:00</updated>
<author>
<name>Bruce Allan</name>
<email>bruce.w.allan@intel.com</email>
</author>
<published>2011-01-04T01:16:44+00:00</published>
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<id>urn:sha1:0d6057e48b9d2004024e97252da83dce0661b131</id>
<content type='text'>
Signed-off-by: Bruce Allan &lt;bruce.w.allan@intel.com&gt;
Tested-by: Jeff Pieper &lt;jeffrey.e.pieper@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>e1000e: cleanup variables set but not used</title>
<updated>2011-01-10T07:44:06+00:00</updated>
<author>
<name>Bruce Allan</name>
<email>bruce.w.allan@intel.com</email>
</author>
<published>2011-01-06T14:29:48+00:00</published>
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<id>urn:sha1:dd93f95e92283498f2497a632a81c167444668b5</id>
<content type='text'>
The ICR register is clear on read and we don't care what the returned value
is when resetting the hardware so the icr variable(s) can be removed.  We
should not ignore the return from e1000_lv_jumbo_workaround_ich8lan() and
from e1000_get_phy_id_82571() (dump a debug message when it fails and when
an unknown Phy id is returned).

Signed-off-by: Bruce Allan &lt;bruce.w.allan@intel.com&gt;
Tested-by: Emil Tantilov &lt;emil.s.tantilov@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>e1000e: checkpatch error - open braces</title>
<updated>2010-12-25T05:30:46+00:00</updated>
<author>
<name>Bruce Allan</name>
<email>bruce.w.allan@intel.com</email>
</author>
<published>2010-12-11T05:53:42+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=6480641eb741cabbba8e196d4f17db7fb80d101c'/>
<id>urn:sha1:6480641eb741cabbba8e196d4f17db7fb80d101c</id>
<content type='text'>
ERROR: that open brace { should be on the previous line

Signed-off-by: Bruce Allan &lt;bruce.w.allan@intel.com&gt;
Tested-by: Emil Tantilov &lt;emil.s.tantilov@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>e1000e: checkpatch error - trailing statements</title>
<updated>2010-12-25T05:29:34+00:00</updated>
<author>
<name>Bruce Allan</name>
<email>bruce.w.allan@intel.com</email>
</author>
<published>2010-12-11T05:53:37+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=184125a389cf2c81980de5d5f365c786cc76d229'/>
<id>urn:sha1:184125a389cf2c81980de5d5f365c786cc76d229</id>
<content type='text'>
ERROR: trailing statements should be on next line

Signed-off-by: Bruce Allan &lt;bruce.w.allan@intel.com&gt;
Tested-by: Emil Tantilov &lt;emil.s.tantilov@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
</content>
</entry>
<entry>
<title>e1000e: use hardware writeback batching</title>
<updated>2010-10-01T00:59:31+00:00</updated>
<author>
<name>Jesse Brandeburg</name>
<email>jesse.brandeburg@intel.com</email>
</author>
<published>2010-09-29T21:38:49+00:00</published>
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<id>urn:sha1:3a3b75860527a11ba5035c6aa576079245d09e2a</id>
<content type='text'>
Most e1000e parts support batching writebacks.  The problem with this is
that when some of the TADV or TIDV timers are not set, Tx can sit forever.

This is solved in this patch with write flushes using the Flush Partial
Descriptors (FPD) bit in TIDV and RDTR.

This improves bus utilization and removes partial writes on e1000e,
particularly from 82571 parts in S5500 chipset based machines.

Only ES2LAN and 82571/2 parts are included in this optimization, to reduce
testing load.

Signed-off-by: Jesse Brandeburg &lt;jesse.brandeburg@intel.com&gt;
Tested-by: Emil Tantilov &lt;emil.s.tantilov@intel.com&gt;
Signed-off-by: Jeff Kirsher &lt;jeffrey.t.kirsher@intel.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
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