<feed xmlns='http://www.w3.org/2005/Atom'>
<title>lwn.git/drivers/mtd/spi-nor/spansion.c, branch docs-fixes</title>
<subtitle>Linux kernel documentation tree maintained by Jonathan Corbet</subtitle>
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<updated>2025-11-10T10:12:06+00:00</updated>
<entry>
<title>mtd: spi-nor: spansion: SMPT fixups for S25FS-S</title>
<updated>2025-11-10T10:12:06+00:00</updated>
<author>
<name>Takahiro Kuwano</name>
<email>Takahiro.Kuwano@infineon.com</email>
</author>
<published>2025-11-05T07:48:00+00:00</published>
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<id>urn:sha1:e8f288a115f4850a65063af8787545dbf50abf47</id>
<content type='text'>
S25FS-S family supports SMPT that helps to detect sector layout settings
in configuration registers, but some of parameters in the table are
wrong or undetermined so the fixups below are required.

Read Any Register op is used to read configuration registers that
related to sector map. The op requires 8 cycles latency by default.
Implement smpt_read_dummy() to set correct dummy cycles.

Map ID is structured by combination of CR3NV[3], CR1NV[2], and CR3NV[1].
However, in S25FS512S, CR3NV[1] is RFU and always 0, while map IDs
defined in the table assume it is always 1. Implement smpt_map_id() to
fix map ID for S25FS512S. Other densities in S25FS-S family (256Mb and
128Mb) don't need this fix as CR3NV[1] in those chips is configurable
and map IDs are correctly defined in SMPT.

Co-developed-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
Reviewed-by: Tudor Ambarus &lt;tudor.ambarus@linaro.org&gt;
Tested-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt; # S25FS512S
Signed-off-by: Takahiro Kuwano &lt;Takahiro.Kuwano@infineon.com&gt;
Signed-off-by: Pratyush Yadav &lt;pratyush@kernel.org&gt;
</content>
</entry>
<entry>
<title>mtd: spi-nor: spansion: Fixup params-&gt;set_4byte_addr_mode for SEMPER</title>
<updated>2025-07-03T14:57:12+00:00</updated>
<author>
<name>Takahiro Kuwano</name>
<email>Takahiro.Kuwano@infineon.com</email>
</author>
<published>2025-06-12T07:44:27+00:00</published>
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<id>urn:sha1:a45ab839f52f3f00ac3dae18a50e902efd216de2</id>
<content type='text'>
Infineon SEMPER flash family does not support E9h opcode as Exit 4-byte
mode (EX4B). Therefore, params-&gt;set_4byte_addr_mode is not determined by
BFPT parse. Fixup it up by introducing vendor specific EX4B opcode (B8h)
and function.

Fixes: c87c9b11c53ce ("mtd: spi-nor: spansion: Determine current address mode")
Signed-off-by: Takahiro Kuwano &lt;Takahiro.Kuwano@infineon.com&gt;
Acked-by: Tudor Ambarus &lt;tudor.ambarus@linaro.org&gt;
Acked-by: Pratyush Yadav &lt;pratyush@kernel.org&gt;
Signed-off-by: Pratyush Yadav &lt;pratyush@kernel.org&gt;
Link: https://lore.kernel.org/r/20250612074427.22263-1-Takahiro.Kuwano@infineon.com
</content>
</entry>
<entry>
<title>mtd: spi-nor: Constify struct spi_nor_fixups</title>
<updated>2025-07-03T14:50:21+00:00</updated>
<author>
<name>Christophe JAILLET</name>
<email>christophe.jaillet@wanadoo.fr</email>
</author>
<published>2025-05-25T16:53:31+00:00</published>
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<id>urn:sha1:d8b73ce1c5fc60cff8628d406caf7a5a5cecb1c7</id>
<content type='text'>
'struct spi_nor_fixups' are not modified in this driver.

Constifying these structures moves some data to a read-only section, so
increases overall security, especially when the structure holds some
function pointers.

On a x86_64, with allmodconfig, as an example:
Before:
======
   text	   data	    bss	    dec	    hex	filename
  23304	  13168	      0	  36472	   8e78	drivers/mtd/spi-nor/micron-st.o

After:
=====
   text	   data	    bss	    dec	    hex	filename
  23560	  12912	      0	  36472	   8e78	drivers/mtd/spi-nor/micron-st.o

Signed-off-by: Christophe JAILLET &lt;christophe.jaillet@wanadoo.fr&gt;
Acked-by: Pratyush Yadav &lt;pratyush@kernel.org&gt;
Signed-off-by: Pratyush Yadav &lt;pratyush@kernel.org&gt;
Link: https://lore.kernel.org/r/aa641732ba707ce3690217825c3ca7373ffde4f9.1748191985.git.christophe.jaillet@wanadoo.fr
</content>
</entry>
<entry>
<title>mtd: spi-nor: spansion: Add support for S28HL02GT</title>
<updated>2025-01-13T15:51:10+00:00</updated>
<author>
<name>Takahiro Kuwano</name>
<email>Takahiro.Kuwano@infineon.com</email>
</author>
<published>2024-12-19T07:06:16+00:00</published>
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<id>urn:sha1:b239cbc7b078ff9c8b218c6191550ae28763fdaa</id>
<content type='text'>
Infineon S28HL02GT is 3.0V, 2Gb Flash device with Octal interface.
It has the same functionalities with S28HS02GT.

Link: https://www.infineon.com/dgdl/Infineon-S28HS02GT_S28HS04GT_S28HL02GT_S28HL04GT_2Gb_4Gb_SEMPER_Flash_Octal_interface_1.8V_3.0V-DataSheet-v01_00-EN.pdf?fileId=8ac78c8c7e7124d1017f0631e33714d9
Signed-off-by: Takahiro Kuwano &lt;Takahiro.Kuwano@infineon.com&gt;
Reviewed-by: Tudor Ambarus &lt;tudor.ambarus@linaro.org&gt;
[pratyush@kernel.org: add comment with flash name]
Signed-off-by: Pratyush Yadav &lt;pratyush@kernel.org&gt;
Link: https://lore.kernel.org/r/dc6aa706253a5200ff0c0d4523c2540312575c01.1734588106.git.Takahiro.Kuwano@infineon.com
</content>
</entry>
<entry>
<title>mtd: spi-nor: spansion: Add support for S28HL256T</title>
<updated>2025-01-13T15:51:05+00:00</updated>
<author>
<name>Takahiro Kuwano</name>
<email>Takahiro.Kuwano@infineon.com</email>
</author>
<published>2024-12-19T07:06:15+00:00</published>
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<id>urn:sha1:78bc75e16e03822218bcbae0578fdf988af39ffd</id>
<content type='text'>
Infineon S28HL256T is 3.0V, 256Mb Flash device with Octal interface.
It has the same functionalities with S28HS256T(1.8V).

Link: https://www.infineon.com/dgdl/Infineon-S28HS256T_S28HL256T_256Mb_SEMPER_Flash_Octal_interface_1_8V_3-DataSheet-v02_00-EN.pdf?fileId=8ac78c8c8fc2dd9c018fc66787aa0657
Signed-off-by: Takahiro Kuwano &lt;Takahiro.Kuwano@infineon.com&gt;
Reviewed-by: Tudor Ambarus &lt;tudor.ambarus@linaro.org&gt;
[pratyush@kernel.org: add comment with flash name]
Signed-off-by: Pratyush Yadav &lt;pratyush@kernel.org&gt;
Link: https://lore.kernel.org/r/f052b04693f1100e725e076fd8a0ae339f8002c4.1734588106.git.Takahiro.Kuwano@infineon.com
</content>
</entry>
<entry>
<title>mtd: spi-nor: spansion: Use nor-&gt;addr_nbytes in octal DTR mode in RD_ANY_REG_OP</title>
<updated>2024-10-29T08:23:00+00:00</updated>
<author>
<name>Takahiro Kuwano</name>
<email>Takahiro.Kuwano@infineon.com</email>
</author>
<published>2024-10-16T00:08:37+00:00</published>
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<id>urn:sha1:b61c35e3404557779ec427c077f7a9f057bb053d</id>
<content type='text'>
In octal DTR mode, RD_ANY_REG_OP needs to use 4-byte address regardless
of flash's internal address mode. Use nor-&gt;addr_nbytes which is set to 4
during setup.

Fixes: eff9604390d6 ("mtd: spi-nor: spansion: add octal DTR support in RD_ANY_REG_OP")
Signed-off-by: Takahiro Kuwano &lt;Takahiro.Kuwano@infineon.com&gt;
Link: https://lore.kernel.org/r/20241016000837.17951-1-Takahiro.Kuwano@infineon.com
Signed-off-by: Tudor Ambarus &lt;tudor.ambarus@linaro.org&gt;
</content>
</entry>
<entry>
<title>mtd: spi-nor: spansion: Add support for S28HS256T</title>
<updated>2024-09-14T15:56:31+00:00</updated>
<author>
<name>Takahiro Kuwano</name>
<email>Takahiro.Kuwano@infineon.com</email>
</author>
<published>2024-08-30T08:04:28+00:00</published>
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<id>urn:sha1:1dc6cd4f94ad5c9432dc7c7a1e1ed6c52ec856ad</id>
<content type='text'>
Infineon S28HS256T is 256Mb Octal SPI device which has same
functionalities with 512Mb and 1Gb parts.

Link: https://www.infineon.com/dgdl/Infineon-S28HS256T_S28HL256T_256Mb_SEMPER_Flash_Octal_interface_1_8V_3-DataSheet-v02_00-EN.pdf?fileId=8ac78c8c8fc2dd9c018fc66787aa0657
Signed-off-by: Takahiro Kuwano &lt;Takahiro.Kuwano@infineon.com&gt;
Reviewed-by: Michael Walle &lt;mwalle@kernel.org&gt;
Signed-off-by: Pratyush Yadav &lt;pratyush@kernel.org&gt;
Link: https://lore.kernel.org/r/20240830080428.6994-1-Takahiro.Kuwano@infineon.com
</content>
</entry>
<entry>
<title>mtd: spi-nor: spansion: enable die erase for multi die flashes</title>
<updated>2023-12-06T09:25:07+00:00</updated>
<author>
<name>Tudor Ambarus</name>
<email>tudor.ambarus@linaro.org</email>
</author>
<published>2023-11-25T12:35:26+00:00</published>
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<id>urn:sha1:461d0babb54462188c98818b472e6a3d5a91fd60</id>
<content type='text'>
Enable die erase for spansion multi die flashes.

Tested-by: Takahiro Kuwano &lt;Takahiro.Kuwano@infineon.com&gt;
Link: https://lore.kernel.org/r/20231125123529.55686-3-tudor.ambarus@linaro.org
Signed-off-by: Tudor Ambarus &lt;tudor.ambarus@linaro.org&gt;
</content>
</entry>
<entry>
<title>mtd: spi-nor: spansion: sort flash_info database</title>
<updated>2023-09-19T15:59:21+00:00</updated>
<author>
<name>Michael Walle</name>
<email>mwalle@kernel.org</email>
</author>
<published>2023-09-08T10:16:55+00:00</published>
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<id>urn:sha1:8770a6a89b15af072376fd4ccfb55ea1bda3821b</id>
<content type='text'>
The flash ID is the new primary key into our database. Sort the entry by
it. Keep the most specific ones first, because there might be ID
collisions between shorter and longer ones.

Signed-off-by: Michael Walle &lt;mwalle@kernel.org&gt;
Link: https://lore.kernel.org/r/20230807-mtd-flash-info-db-rework-v3-37-e60548861b10@kernel.org
Signed-off-by: Tudor Ambarus &lt;tudor.ambarus@linaro.org&gt;
</content>
</entry>
<entry>
<title>mtd: spi-nor: spansion: convert flash_info to new format</title>
<updated>2023-09-19T15:59:20+00:00</updated>
<author>
<name>Michael Walle</name>
<email>mwalle@kernel.org</email>
</author>
<published>2023-09-08T10:16:44+00:00</published>
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<id>urn:sha1:bb2d5c67b926811ea8bab882f61cef0e660aa30e</id>
<content type='text'>
The INFOx() macros are going away. Convert the flash_info database to
the new format.

Signed-off-by: Michael Walle &lt;mwalle@kernel.org&gt;
Link: https://lore.kernel.org/r/20230807-mtd-flash-info-db-rework-v3-26-e60548861b10@kernel.org
Signed-off-by: Tudor Ambarus &lt;tudor.ambarus@linaro.org&gt;
</content>
</entry>
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