<feed xmlns='http://www.w3.org/2005/Atom'>
<title>lwn.git/drivers/mtd/nand/mtk_nand.c, branch v6.0-rc7</title>
<subtitle>Linux kernel documentation tree maintained by Jonathan Corbet</subtitle>
<id>http://mirrors.hust.edu.cn/git/lwn.git/atom?h=v6.0-rc7</id>
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<updated>2018-02-16T09:09:34+00:00</updated>
<entry>
<title>mtd: nand: move raw NAND related code to the raw/ subdir</title>
<updated>2018-02-16T09:09:34+00:00</updated>
<author>
<name>Boris Brezillon</name>
<email>boris.brezillon@bootlin.com</email>
</author>
<published>2018-02-05T22:02:04+00:00</published>
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<id>urn:sha1:93db446a424cee9387b532995e6b516667079555</id>
<content type='text'>
As part of the process of sharing more code between different NAND
based devices, we need to move all raw NAND related code to the raw/
subdirectory.

Signed-off-by: Boris Brezillon &lt;boris.brezillon@bootlin.com&gt;
</content>
</entry>
<entry>
<title>mtd: nand: mtk: Support MT7622 NAND flash controller.</title>
<updated>2017-12-14T12:34:22+00:00</updated>
<author>
<name>RogerCC Lin</name>
<email>rogercc.lin@mediatek.com</email>
</author>
<published>2017-11-30T14:10:45+00:00</published>
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<id>urn:sha1:98dea8d71931460c189e5001b0faf2180a42db42</id>
<content type='text'>
Add tables to support MT7622 NAND flash controller.

Signed-off-by: RogerCC Lin &lt;rogercc.lin@mediatek.com&gt;
Signed-off-by: Boris Brezillon &lt;boris.brezillon@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>mtd: nand: mtk: Support different MTK NAND flash controller IP</title>
<updated>2017-12-14T12:34:21+00:00</updated>
<author>
<name>RogerCC Lin</name>
<email>rogercc.lin@mediatek.com</email>
</author>
<published>2017-11-30T14:10:44+00:00</published>
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<id>urn:sha1:b45ee5501ede9a369e9bc20edca508193b848d25</id>
<content type='text'>
MT7622 uses an MTK's earlier NAND flash controller IP which support
different sector size, max spare size per sector and paraity bits...,
some register's offset and definition also been changed in the NAND
flash controller, this patch is the preparation to support MT7622
NAND flash controller.

MT7622 NFC and ECC engine are similar to MT2701's, except below
differences:
(1)MT7622 NFC's max sector size(ECC data size) is 512 bytes, and
   MT2701's is 1024, and MT7622's max sector number is 8.
(2)The parity bit of MT7622 is 13, MT2701 is 14.
(3)MT7622 ECC supports less ECC strength, max to 16 bit ecc strength.
(4)MT7622 supports less spare size per sector, max spare size per
   sector is 28 bytes.
(5)Some register's offset are different, include ECC_ENCIRQ_EN,
   ECC_ENCIRQ_STA, ECC_DECDONE, ECC_DECIRQ_EN and ECC_DECIRQ_STA.
(6)ENC_MODE of ECC_ENCCNFG register is moved from bit 5-6 to bit 4-5.

Signed-off-by: RogerCC Lin &lt;rogercc.lin@mediatek.com&gt;
Signed-off-by: Boris Brezillon &lt;boris.brezillon@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>mtd: nand: force drivers to explicitly send READ/PROG commands</title>
<updated>2017-12-14T12:34:17+00:00</updated>
<author>
<name>Boris Brezillon</name>
<email>boris.brezillon@free-electrons.com</email>
</author>
<published>2017-11-30T17:01:30+00:00</published>
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<id>urn:sha1:25f815f66a141436df8a4c45e5d2765272aea2ac</id>
<content type='text'>
The core currently send the READ0 and SEQIN+PAGEPROG commands in
nand_do_read/write_ops(). This is inconsistent with
-&gt;read/write_oob[_raw]() hooks behavior which are expected to send
these commands.

There's already a flag (NAND_ECC_CUSTOM_PAGE_ACCESS) to inform the core
that a specific controller wants to send the READ/SEQIN+PAGEPROG
commands on its own, but it's an opt-in flag, and existing drivers are
unlikely to be updated to pass it.

Moreover, some controllers cannot dissociate the READ/PAGEPROG commands
from the associated data transfer and ECC engine activation, and
developers have to hack things in their -&gt;cmdfunc() implementation to
handle such complex cases, or have to accept the perf penalty of sending
twice the same command.
To address this problem we are planning on adding a new interface which
is passed all information about a NAND operation (including the amount
of data to transfer) and replacing all calls to -&gt;cmdfunc() to calls to
this new -&gt;exec_op() hook. But, in order to do that, we need to have all
-&gt;cmdfunc() calls placed near their associated -&gt;read/write_buf/byte()
calls.

Modify the core and relevant drivers to make NAND_ECC_CUSTOM_PAGE_ACCESS
the default case, and remove this flag.

Signed-off-by: Boris Brezillon &lt;boris.brezillon@free-electrons.com&gt;
[miquel.raynal@free-electrons.com: tested, fixed and rebased on nand/next]
Signed-off-by: Miquel Raynal &lt;miquel.raynal@free-electrons.com&gt;
Acked-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>mtd: nand: provide several helpers to do common NAND operations</title>
<updated>2017-12-14T12:34:12+00:00</updated>
<author>
<name>Boris Brezillon</name>
<email>boris.brezillon@free-electrons.com</email>
</author>
<published>2017-11-30T17:01:29+00:00</published>
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<id>urn:sha1:97d90da8a886949f09bb4754843fb0b504956ad2</id>
<content type='text'>
This is part of the process of removing direct calls to -&gt;cmdfunc()
outside of the core in order to introduce a better interface to execute
NAND operations.

Here we provide several helpers and make use of them to remove all
direct calls to -&gt;cmdfunc(). This way, we can easily modify those
helpers to make use of the new -&gt;exec_op() interface when available.

Signed-off-by: Boris Brezillon &lt;boris.brezillon@free-electrons.com&gt;
[miquel.raynal@free-electrons.com: rebased and fixed some conflicts]
Signed-off-by: Miquel Raynal &lt;miquel.raynal@free-electrons.com&gt;
Acked-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>mtd: nand: mtk: use nand_reset() to reset NAND devices in resume function</title>
<updated>2017-11-30T09:57:27+00:00</updated>
<author>
<name>Xiaolei Li</name>
<email>xiaolei.li@mediatek.com</email>
</author>
<published>2017-11-02T02:05:07+00:00</published>
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<id>urn:sha1:f883199d17b87e86a4ebd50bdee69285814bdce7</id>
<content type='text'>
Previously, we only select chips and then send reset command to a NAND
device during resuming nand driver. There is a lack of deselecting chips.
It is advised to reset and initialize a NAND device using nand_reset().

Signed-off-by: Xiaolei Li &lt;xiaolei.li@mediatek.com&gt;
Reviewed-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Signed-off-by: Boris Brezillon &lt;boris.brezillon@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>mtd: nand: Rename nand.h into rawnand.h</title>
<updated>2017-08-13T08:11:49+00:00</updated>
<author>
<name>Boris Brezillon</name>
<email>boris.brezillon@free-electrons.com</email>
</author>
<published>2017-08-04T15:29:10+00:00</published>
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<id>urn:sha1:d4092d76a4a4e57b65910899948a83cc8646c5a5</id>
<content type='text'>
We are planning to share more code between different NAND based
devices (SPI NAND, OneNAND and raw NANDs), but before doing that
we need to move the existing include/linux/mtd/nand.h file into
include/linux/mtd/rawnand.h so we can later create a nand.h header
containing all common structure and function prototypes.

Signed-off-by: Boris Brezillon &lt;boris.brezillon@free-electrons.com&gt;
Signed-off-by: Peter Pan &lt;peterpandong@micron.com&gt;
Acked-by: Vladimir Zapolskiy &lt;vz@mleia.com&gt;
Acked-by: Alexander Sverdlin &lt;alexander.sverdlin@gmail.com&gt;
Acked-by: Wenyou Yang &lt;wenyou.yang@microchip.com&gt;
Acked-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
Acked-by: Han Xu &lt;han.xu@nxp.com&gt;
Acked-by: H Hartley Sweeten &lt;hsweeten@visionengravers.com&gt;
Acked-by: Shawn Guo &lt;shawnguo@kernel.org&gt;
Acked-by: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Acked-by: Neil Armstrong &lt;narmstrong@baylibre.com&gt;
Acked-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Acked-By: Harvey Hunt &lt;harveyhuntnexus@gmail.com&gt;
Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Acked-by: Krzysztof Halasa &lt;khalasa@piap.pl&gt;
</content>
</entry>
<entry>
<title>mtd: nand: mtk: add -&gt;setup_data_interface() hook</title>
<updated>2017-06-25T14:54:03+00:00</updated>
<author>
<name>Xiaolei Li</name>
<email>xiaolei.li@mediatek.com</email>
</author>
<published>2017-06-23T07:12:28+00:00</published>
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<id>urn:sha1:edfee3619c4955be38d414f25bd4f6c5c1b029ba</id>
<content type='text'>
Currently, we use the fixed ACC timing 0x10804211. This is not the best
setting for each case. Actually, MTK NAND controller can adapt ACC timings
dynamically according to nfi clock frequence.
Implement the -&gt;setup_data_interface() hook to optimize driver performance.

Signed-off-by: Xiaolei Li &lt;xiaolei.li@mediatek.com&gt;
Signed-off-by: Boris Brezillon &lt;boris.brezillon@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>mtd: nand: mtk: remove unneeded mtk_nfc_hw_init from mtk_nfc_resume</title>
<updated>2017-06-25T14:54:02+00:00</updated>
<author>
<name>Xiaolei Li</name>
<email>xiaolei.li@mediatek.com</email>
</author>
<published>2017-06-23T07:12:26+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=777a8d92dfca26e63b0fe7ea9889618291512f1d'/>
<id>urn:sha1:777a8d92dfca26e63b0fe7ea9889618291512f1d</id>
<content type='text'>
chip-&gt;select_chip will do nfc runtime configuration. There is no need to
do mtk_nfc_hw_init before it.

Signed-off-by: Xiaolei Li &lt;xiaolei.li@mediatek.com&gt;
Signed-off-by: Boris Brezillon &lt;boris.brezillon@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>mtd: nand: mediatek: add support for MT2712 NAND FLASH Controller</title>
<updated>2017-06-01T08:09:38+00:00</updated>
<author>
<name>Xiaolei Li</name>
<email>xiaolei.li@mediatek.com</email>
</author>
<published>2017-05-31T08:26:41+00:00</published>
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<id>urn:sha1:30ee809e980b07f467fca3e7ee16e8d034cf41af</id>
<content type='text'>
MT2712 NAND FLASH Controller is similar to MT2701 except those following:
(1) MT2712 supports up to 148B spare size per 1KB size sector (the same
    with 74B spare size per 512B size sector). There are three new spare
    format: 61, 67, 74.
(2) MT2712 supports up to 80 bit ecc strength. There are three new ecc
    strength level: 68, 72, 80.
(3) MT2712 ECC encode parity data register's start offset is 0x300, and
    different with 0x10 of MT2701.
(4) MT2712 improves ecc irq function. When ECC works in ECC_NFI_MODE,
    MT2701 will generate ecc irq number the same with ecc steps during
    page read. However, MT2712 can only generate one ecc irq.

Changes of this patch are:
(1) add two new variables named pg_irq_sel, encode_parity_reg0 in struct
    mtk_ecc_caps.
(2) add new bitfield ECC_PG_IRQ_SEL for register ECC_IRQ_REG.
(3) add ecc strength array of mt2712.
(4) add spare size array of mt2712.
(5) add mt2712 nfc and ecc device compatiable and data.

Signed-off-by: Xiaolei Li &lt;xiaolei.li@mediatek.com&gt;
Signed-off-by: Boris Brezillon &lt;boris.brezillon@free-electrons.com&gt;
</content>
</entry>
</feed>
