lwn.git/drivers/memory, branch v6.5-rc1

Merge tag 'asm-generic-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic

2023-07-06T17:06:04+00:00

Pull asm-generic updates from Arnd Bergmann: "These are cleanups for architecture specific header files: - the comments in include/linux/syscalls.h have gone out of sync and are really pointless, so these get removed - The asm/bitsperlong.h header no longer needs to be architecture specific on modern compilers, so use a generic version for newer architectures that use new enough userspace compilers - A cleanup for virt_to_pfn/virt_to_bus to have proper type checking, forcing the use of pointers" * tag 'asm-generic-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic: syscalls: Remove file path comments from headers tools arch: Remove uapi bitsperlong.h of hexagon and microblaze asm-generic: Unify uapi bitsperlong.h for arm64, riscv and loongarch m68k/mm: Make pfn accessors static inlines arm64: memory: Make virt_to_pfn() a static inline ARM: mm: Make virt_to_pfn() a static inline asm-generic/page.h: Make pfn accessors static inlines xen/netback: Pass (void *) to virt_to_page() netfs: Pass a pointer to virt_to_page() cifs: Pass a pointer to virt_to_page() in cifsglob cifs: Pass a pointer to virt_to_page() riscv: mm: init: Pass a pointer to virt_to_page() ARC: init: Pass a pointer to virt_to_pfn() in init m68k: Pass a pointer to virt_to_pfn() virt_to_page() fs/proc/kcore.c: Pass a pointer to virt_addr_valid()

Merge tag 'memory-controller-drv-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into soc/drivers

2023-06-22T15:34:02+00:00

Memory controller drivers for v6.5 1. Renesas RPC IF: correct the Strobe Timing Adjustment. 2. Broadcom DPFE: fix smatch warning for testing array offset after use. 3. Atmel SDRAMC: drop driver because it was just a wrapper over enabling clock which is not handled by its clock controller. 4. Minor bindings cleanup. * tag 'memory-controller-drv-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: dt-bindings: memory-controllers: drop unneeded quotes memory: atmel-sdramc: remove the driver memory: brcmstb_dpfe: fix testing array offset after use memory: renesas-rpc-if: Fix PHYCNT.STRTIM setting Link: https://lore.kernel.org/r/20230612175508.288775-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann

memory: atmel-sdramc: remove the driver

2023-06-02T08:39:24+00:00

Driver does only clock request + enable for DDR clocks. DDR clocks are enabled by bootloader and need to stay that way in Linux. To avoid having these clocks disabled by clock subsystem in case there are no Linux consumers for them the clocks were marked as critical in clock drivers (in commit 68b3b6f1773d ("clk: at91: mark ddr clocks as critical")). With this, there is no need to have a separate driver that only does clock request + enable. Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20230516072405.2696225-1-claudiu.beznea@microchip.com Signed-off-by: Krzysztof Kozlowski

memory: brcmstb_dpfe: fix testing array offset after use

2023-05-30T08:25:24+00:00

Code should first check for valid value of array offset, then use it as the index. Fixes smatch warning: drivers/memory/brcmstb_dpfe.c:443 __send_command() error: testing array offset 'cmd' after use. Fixes: 2f330caff577 ("memory: brcmstb: Add driver for DPFE") Acked-by: Markus Mayer Reviewed-by: Florian Fainelli Link: https://lore.kernel.org/r/20230513112931.176066-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski

ARM: mm: Make virt_to_pfn() a static inline

2023-05-29T09:27:08+00:00

Making virt_to_pfn() a static inline taking a strongly typed (const void *) makes the contract of a passing a pointer of that type to the function explicit and exposes any misuse of the macro virt_to_pfn() acting polymorphic and accepting many types such as (void *), (unitptr_t) or (unsigned long) as arguments without warnings. Doing this is a bit intrusive: virt_to_pfn() requires PHYS_PFN_OFFSET and PAGE_SHIFT to be defined, and this is defined in , so this must be included *before* . The use of macros were obscuring the unclear inclusion order here, as the macros would eventually be resolved, but a static inline like this cannot be compiled with unresolved macros. The naive solution to include at the top of does not work, because sometimes includes at the end of itself, which would create a confusing inclusion loop. So instead, take the approach to always unconditionally include at the end of arch/arm uses explicitly in a lot of places, however it turns out that if we just unconditionally include into and switch all inclusions of to instead, we enforce the right order and will always have access to the definitions. Put an inclusion guard in place making it impossible to include explicitly. Link: https://lore.kernel.org/linux-mm/20220701160004.2ffff4e5ab59a55499f4c736@linux-foundation.org/ Signed-off-by: Linus Walleij

memory: tegra: Make CPU cluster BW request a multiple of MC channels

2023-05-16T10:11:01+00:00

Make CPU cluster's bandwidth (BW) request a multiple of MC channels. CPU OPP tables have BW info per MC channel. But, the actual BW depends on the number of MC channels which can change as per the boot config. Get the number of MC channels which are actually enabled in current boot configuration and multiply the BW request from a CPU cluster with the number of enabled MC channels. This is not required to be done for other MC clients. Signed-off-by: Sumit Gupta Acked-by: Krzysztof Kozlowski Signed-off-by: Thierry Reding

memory: tegra: Add software memory clients in Tegra234

2023-05-16T10:11:00+00:00

Add dummy memory controller clients to represent CPU clusters. They will be used by the CPUFREQ driver to scale DRAM FREQ with the CPU FREQ. Signed-off-by: Sumit Gupta Acked-by: Krzysztof Kozlowski Signed-off-by: Thierry Reding

memory: tegra: Add memory clients for Tegra234

2023-05-16T10:11:00+00:00

Add few isochronous (ISO) and non-ISO memory clients. ISO clients have guaranteed bandwidth requirement. PCIe clients added to the memory client table represent each controller in Tegra234. Signed-off-by: Sumit Gupta Acked-by: Krzysztof Kozlowski Signed-off-by: Thierry Reding

memory: tegra: Add interconnect support for DRAM scaling in Tegra234

2023-05-16T10:11:00+00:00

Add Interconnect framework support to dynamically set the DRAM bandwidth from different clients. Both the MC and EMC drivers are added as ICC providers. The path for any request is: MC-Client[1-n] -> MC -> EMC -> EMEM/DRAM MC client's request for bandwidth will go to the MC driver which passes the client request info like BPMP Client ID, Client type and the Bandwidth to the BPMP-FW. The final DRAM freq to achieve the requested bandwidth is set by the BPMP-FW based on the passed parameters. Signed-off-by: Sumit Gupta Acked-by: Krzysztof Kozlowski Signed-off-by: Thierry Reding

memory: renesas-rpc-if: Fix PHYCNT.STRTIM setting

2023-05-08T10:18:25+00:00

According to the datasheets, the Strobe Timing Adjustment bit (STRTIM) setting is different on R-Car SoCs, i.e. R-Car M3 ES1.* : STRTIM[2:0] is set to 0x6 other R-Car Gen3: STRTIM[2:0] is set to 0x7 other R-Car Gen4: STRTIM[3:0] is set to 0xf To fix this issue, a DT match data was added to specify the setting for special use cases. Signed-off-by: Cong Dang Signed-off-by: Hai Pham [wsa: rebased, restructured, added Gen4 support] Signed-off-by: Wolfram Sang Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20230419130234.44321-1-wsa+renesas@sang-engineering.com Signed-off-by: Krzysztof Kozlowski